530NA1324M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 530NA1324M00DG

530NA1324M00DG: DescriptionLVDS Output Clock Oscillator, 1324MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530NA1324M00DG Overview

LVDS Output Clock Oscillator, 1324MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530NA1324M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1324 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Phase failure protection circuit for detecting line current Part 5

Geiger counter circuit diagram

LT1270 application circuit diagram

AC solid state relay controlled motor forward and reverse control circuit

Tianjin 4S1 type hearing aid circuit

Round computer automatic rice cooker circuit 2

How do capacitors and inductors store energy?: The content shared is: How do capacitors and inductors store energy? This question is the principle that many electronics beginners want to know. Among them, since there are still many debates about t...; Jacktang Energy Infrastructure?

What is the difference between STM32 output compare mode and PWM mode: What is the difference between STM32 output comparison mode and PWM mode? Both modes can actually output PWM...; yuke30 stm32/stm8

Chip stm32f103r8t6, crystal oscillator parameter problem: I used stm32f103rb before and never had any problems. This time I used stm32f103r8.I noticed the chip was marked with version Y. The chips I used before were all version Z.Is there something wrong wit...; shanjian13 stm32/stm8

Has anyone used JLINK to debug the 2440 board in ADS?: Has anyone used JLINK to adjust the 2440 board in ADS? Can you tell me the general settings? After I set the RDI mode, the CORE model recognized by AXD is ARM79_0 instead of ARM920T. I don't know why?...; 2002xiao Embedded System

Raspberry Pi (I) Using Python language to flash GPIO pins: [postbg]bg9.png[/postbg][font=黑体][size=4] I have been learning about Raspberry Pi for a while recently, and I can't wait to turn on a lamp to try out the effect of Raspberry Pi. There are some differe...; bqgup Creative Market

Share a GNU C language manual written by Richard Stallman: Excellent e-book, which introduces C syntax and some GNU dialects in detail. In the embedded field, the requirements and use of C are much higher than general system programming. The length is not lon...; freebsder Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components