Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010:MAC7131 products in 208 MAPBGA packages
The use of a PLL allows power drain and performance to be balanced to best fit requirements. The
operating frequency of devices in the family is up to a maximum of 50 MHz. The internal data paths
between the CPU core, eDMA, memory and peripherals are all 32 bits wide, further improving
performance for 32-bit applications. The MAC7111, MAC7116, MAC7131 and MAC7136 also offer a
16-bit wide external data bus with 22 address lines. The family of devices is capable of operating over a
junction temperature range of –40° C to 150° C.
2
Ordering Information
M AC 7 1 0 1 C PV 50 xx
Qualification Status
Core Code
Core Number
Generation / Family
Package Option
Device Number
Temperature Range
Package Identifier
Speed (MHz)
Optional Package Identifiers
Temperature Option
C = –40° C to 85° C
V = –40° C to105° C
M = –40° C to125° C
Package Option
100 LQFP
100 LQFP, RoHS
112 / 144 LQFP
112 / 144 LQFP, RoHS
208 MAP BGA
208 MAP BGA, RoHS
FU =
AF =
PV =
AG =
VF =
VM =
Figure 1. Order Part Number Example
The mask set of a device is marked with a four-character code consisting of a letter, two numerical digits,
and a letter, for example L49P. Slight variations to the mask set identification code may result in an
optional numerical digit preceding the standard four-character code, for example 0L49P.
Table 1. MAC7100 Family Mask Set to Part Number Correspondence
Mask Set
0L49P
1L49P
0L47W
1L47W
0L61W
0L38Y
1L38Y
Status
Engineering samples
Limited production, pre-qualification
Limited production, pre-qualification
Fully-qualified, production
Engineering samples
Engineering samples
Fully-qualified, production
Part Number(s)
PAC7101, PAC7111, PAC7121, PAC7131, PAC7141
PAC7101, PAC7111, PAC7121, PAC7131, PAC7141
PAC7101, PAC7111, PAC7121, PAC7131, PAC7141
MAC7101, MAC7111, MAC7121, MAC7131, MAC7141
PAC7112, PAC7122, PAC7142
PAC7106, PAC7116, PAC7126, PAC7136
MAC7106, MAC7116, MAC7126, MAC7136
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
2
Preliminary
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010:MAC7131 products in 208 MAPBGA packages
inter-integrated circuit (I
2
C™) bus controllers, FlexCAN interfaces, an enhanced modular I/O subsystem
(eMIOS), 10-bit analog-to-digital converter (ATD) module(s), general-purpose timers (PIT) and two
special-purpose timers (RTI and SWT). The peripherals share a large number of general purpose
input-output (GPIO) pins, all of which are bidirectional and available with interrupt capability to trigger
wake-up from low-power chip modes. Refer to
Table 2
for a comparison of family members and
availability of peripheral modules on each device.
Ordering Information
Table 2. MAC7100 Family Device Derivatives
MAC7101
MAC7111
MAC7121
MAC7131
MAC7141
MAC7112
MAC7122
MAC7142
MAC7106
MAC7116
MAC7126
MAC7136
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010:MAC7131 products in 208 MAPBGA packages
Module Options
Program Flash
Data Flash
SRAM
External Bus
ATD Modules
1
A
B
CAN Modules
A
B
C
D
eSCI Modules
A
B
C
D
DSPI Modules
I
2
C Module
eMIOS Module
Timer Module
A
B
General-Purpose
I/O Ports/Pins
C
D
E
F
G
H
I
Total (max.)
Package
A
B
512 KBytes
256 KBytes
32 KBytes
1 MByte
32 KBytes
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
Yes
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
3
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
Yes
—
Yes
Yes
—
—
Yes
Yes
—
Yes
Yes
Yes
Yes
—
Yes
—
Yes
Yes
—
—
Yes
Yes
Yes
—
Yes
Yes
Yes
16 KBytes
—
Yes
—
Yes
Yes
—
—
Yes
Yes
Yes
—
Yes
Yes
3
Yes
—
Yes
—
Yes
Yes
—
—
Yes
Yes
—
—
Yes
Yes
Yes
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
48 KBytes
Yes
Yes
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
Yes
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
3
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
2
Yes
2
Yes
16 channels, 16-bit
10 channels, 24-bit
10
16
12
10
4
16
16
16
16
—
112
4
144
LQFP
16
16
16
16
4
16
16
16
—
—
112
4
144
LQFP
10
15
1
11
4
16
16
16
—
—
85
4
112
LQFP
16
16
16
16
4
16
16
16
16
—
128
4
208
BGA
4
16
—
10
4
16
16
10
—
—
72
4
100
LQFP
16
16
16
16
16
16
16
—
—
112
144
LQFP
10
15
1
11
16
16
16
—
—
85
112
LQFP
4
16
—
10
16
16
10
—
—
72
100
LQFP
10
16
12
10
16
16
16
16
—
112
144
LQFP
16
16
16
16
16
16
16
—
—
112
144
LQFP
10
15
1
11
16
16
16
—
—
85
112
LQFP
16
16
16
16
16
16
16
16
16
144
208
BGA
NOTES:
1. 16 channels, 8/10-bit, per module.
2. Four additional chip selects available.
3. PB11 / PCS2_B not available on non-L49P-mask devices; PB10 / PCS5_B / PCSS_B not available on mask L47W devices.
4. Reduce these values by one for mask set L49P devices (PD2 is not available for general-purpose use).
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Freescale Semiconductor
Preliminary
3
Electrical Characteristics
3
Electrical Characteristics
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010:MAC7131 products in 208 MAPBGA packages
This section contains electrical information for MAC7100 Family microcontrollers. The information is
preliminary and subject to change without notice.
MAC7100 Family devices are specified and tested over the 5 V and 3.3 V ranges. For operation at any
voltage within that range, the 3.3 V specifications generally apply. However, no production testing is done
to verify operation at intermediate supply voltage levels.
3.1
Parameter Classification
The electrical parameters shown in this appendix are derived by various methods. To provide a better
understanding to the designer, the following classification is used. Parameters are tagged accordingly in
the column labeled “C” of the parametric tables, as appropriate.
Table 3. Parametric Value Classification
P
C
T
D
Parameters guaranteed during production testing on each individual device.
Parameters derived by the design characterization and by measuring a statistically relevant sample size across
process variations.
Parameters derived by design characterization on a small sample size from typical devices under typical conditions
(unless otherwise noted). All values shown in the typical column are within this classification, even if not so tagged.
Parameters derived mainly from simulations.
3.2
Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only. Functional operation outside these maximums is not
guaranteed. Stress beyond these limits may affect reliability or cause permanent damage to the device.
MAC7100 Family devices contain circuitry protecting against damage due to high static voltage or electrical
fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs
are tied to an appropriate logic voltage level (for example, either V
SS
5
1
or V
DD
5
1
).
Table 4. Absolute Maximum Ratings
Num
A1a
A2
A3
A4
A5
A6
A7
A8
Rating
I/O Drivers Supply Voltage
Digital Logic Supply Voltage
1
PLL Supply Voltage
1
Analog Supply Voltage
Analog Reference
Voltage difference V
DD
X to V
DD
A
Voltage difference V
SS
X to V
SS
A
Voltage difference V
RH
– V
RL
Symbol
V
DD
X
V
DD
2.5
V
DD
PLL
V
DD
A
V
RH,
V
RL
Δ
VDDX
Δ
VSSX
V
RH
– V
RL
Min
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
Max
+6.0
+3.0
+3.0
+6.0
+6.0
+0.3
+0.3
+6.0
Unit
V
V
V
V
V
V
V
V
1. Refer to
Section 3.7, “Power Supply,”
for definition of V
SS
5 and V
DD
5.
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
4
Preliminary
Freescale Semiconductor
Electrical Characteristics
Table 4. Absolute Maximum Ratings (continued)
Num
A9
A10
A11
A12
Rating
Voltage difference V
DD
A – V
RH
Digital I/O Input Voltage
XFC, EXTAL, XTAL inputs
TEST input
Instantaneous Maximum Current
3
A13
A14
A15
A16
A17
Single pin limit for XFC, EXTAL, XTAL
4
Single pin limit for all digital I/O pins
5
Single pin limit for all analog input pins
5
Single pin limit for TEST
2
Storage Temperature Range
I
DL
I
D
I
DA
I
DT
T
stg
–25
–25
–25
–0.25
–65
+25
+25
+25
0
+155
mA
mA
mA
mA
°C
Symbol
V
DD
A – V
RH
V
IN
V
ILV
V
TEST
Min
–0.3
–0.3
–0.3
–0.3
Max
+6.0
+6.0
+3.0
—
2
Unit
V
V
V
V
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010:MAC7131 products in 208 MAPBGA packages
5
NOTES:
1. The device contains an internal voltage regulator to generate the logic and PLL supply from the I/O supply. The
absolute maximum ratings apply when the device is powered from an external source.
2. This pin is clamped low to V
SS
X, but not clamped high, and must be tied low in applications.
3. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
use the larger of the calculated values using V
POSCLAMP
= V
DD
A + 0.3V and V
NEGCLAMP
= –0.3 V.
4. These pins are internally clamped to V
SS
PLL and V
DD
PLL.
5. All I/O pins are internally clamped to V
SS
X and V
DD
X, V
SS
R and V
DD
R or V
SS
A and V
DD
A.
3.3
ESD Protection and Latch-up Immunity
All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM), the Machine Model (MM) and the Charge Device Model.
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise.
Table 5. ESD and Latch-up Test Conditions
Model
Human Body
Series Resistance
Storage Capacitance
Number of Pulses per pin
positive
negative
Machine
Series Resistance
Storage Capacitance
Number of Pulse per pin
positive
negative
Latch-up
Minimum input voltage limit
Maximum input voltage limit
Description
Symbol
R1
C
—
Value
1500
100
—
3
3
0
200
—
3
3
–2.5
7.5
V
V
Ohm
pF
Unit
Ohm
pF
R1
C
—
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
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