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Datasheet> All Categories > Discrete semiconductor> The transistor> SMPJ110
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SMPJ110

Description
Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-236
CategoryDiscrete semiconductor    The transistor   
File Size91KB，1 Pages
ManufacturerInterFET
Websitehttp://www.interfet.com/
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SMPJ110 Overview

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-236

SMPJ110 Parametric

Parameter NameAttribute value
MakerInterFET
package instructionSMALL OUTLINE, R-PDSO-G3
Reach Compliance Codeunknown
ConfigurationSINGLE
Maximum drain-source on-resistance18 Ω
FET technologyJUNCTION
Maximum feedback capacitance (Crss)15 pF
JEDEC-95 codeTO-236
JESD-30 codeR-PDSO-G3
Number of components1
Number of terminals3
Operating modeDEPLETION MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)0.4 W
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
transistor applicationsSWITCHING
Transistor component materialsSILICON

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B-50
01/99
J110, J110A
N-Channel Silicon Junction Field-Effect Transistor
¥ Choppers
¥ Commutators
¥ Analog Switches
Absolute maximum ratings at T
A
= 25¡C
Reverse Gate Source & Reverse Gate Drain Voltage
Continuous Forward Gate Current
Continuous Device Power Dissipation
Power Derating
– 25 V
50 mA
360 mW
3.27 mW/°C
At 25°C free air temperature:
Static Electrical Characteristics
Gate Source Breakdown Voltage
Gate Reverse Current
Gate Source Cutoff Voltage
Drain Saturation Current (Pulsed)
Drain Cutoff Current
Dynamic Electrical Characteristics
Drain Source ON Resistance
Drain Gate Capacitance
Source Gate Capacitance
Drain Gate + Source Gate Capacitance
Switching Characteristics
Turn ON Delay Time
Rise Time
Turn OFF Delay Time
Fall Time
td
(on)
t
r
td
(off)
t
f
r
ds(on)
C
gd
C
gs
C
gd
+ C
gs
V
(BR)GSS
I
GSS
V
GS(OFF)
I
DSS
I
D(OFF)
J110
Min
– 25
–3
– 0.5
10
3
–4
Max
J110A
Min
– 25
–3
– 0.5
10
3
–4
Max
Unit
V
nA
V
mA
nA
Process NJ450
Test Conditions
I
G
= – 1 µA, V
DS
= ØV
V
GS
= – 15V, V
DS
= ØV
V
DS
= 5V, I
D
= 1 µA
V
DS
= 15V, V
GS
= ØV
V
DS
= 5V, V
GS
= – 10V
18
15
15
85
Typ
4
1
6
30
Typ
4
1
6
30
25
15
15
85
Ω
pF
pF
pF
V
GS
= Ø, V
DS
< = 0.1V
V
DS
= ØV, V
GS
= – 10V
V
DS
= ØV, V
GS
= – 10V
V
DS
= V
GS
= ØV
f = 1 kHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
ns
ns
ns
ns
V
DD
V
GS(OFF)
R
L
J110
1.5
–5
150
J110A
1.5
–5
150
V
V
Ω
TOÐ226AA Package
Dimensions in Inches (mm)
Surface Mount
SMPJ110, SMPJ110A
Pin Configuration
1 Drain, 2 Source, 3 Gate
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287
FAX
(972) 276-3375
www.interfet.com

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