OC-192/STM-64 SERDES Transceiver Module Specification; OAT1049x-V5-z-yy
Document NO: QPS-0302-006
Rev. DRAFT 0.4
OAT1049x-V5-z-yy (for 80km)
OC-192/STM-64 SERDES Transceiver Module
Document Number OPS-0302-006
Revision
DRAFT 0.4
DATE
Oct.17, 2002
Y.FUJISAKU
Author
T. ITOU
Project Manager
Modification History
Rev.
DRAFT0.1
DRAFT0.2
Date
Apr.28, 2002
May30, 2002
Originator
T.ITOU
T.ITOU
Comment
Revision of “Block Diagram”
Revision of “Block Diagram” and “Specifications”
Addition of “Absolute Maximum Ratings”,
“Operating
Environment”,
“Mechanical
Information”, “Connector Pinout”, “Precautions for
Handling”, “Qualifications and Reliability” and
“Laser Safety”
Revision
of
“Block
Diagram”,
“Operation
Environment”, “Specifications”, “Connector Pinout”
and “Ordering Information”
DRAFT0.3
Aug.19, 2002
Y.FUJISAKU
DRAFT0.4
Oct.17, 2002
Y.FUJISAKU
Features ;
•
SONET/SDH 9.95328Gbit/s Operation
•
Support 10.3Gbit/s(10GbE), 10.66Gbit/s(FEC)
and 10.7Gbit/s(OTN) Rate
•
Minimum Sensitivity: < -22dBm
•
Optical Output Power: +2 to +6dBm
•
Wavelength: 1550nm Band
•
Transmission Distance: 80km(1600ps/nm)
•
Dispersion Penalty: <2dB
•
16-Bit Parallel 622.08Mbit/s (Equivalent FEC Rate)
LVDS Data Interface
•
SERDES Timing Compliant with OIF1999.102.8
SFI-4 Interface
•
Jitter Filter Built-in (Except for Multi-Rate Type)
•
Compact Size: 88.9
×
114.3
×
17.5 (mm)
•
Supply Voltage: +3.3V, +1.8V and -5.2V
•
Low Power Consumption: < 9W max. (6W typ.)
Applications ;
•
Metro Network SONET/SDH Systems
•
10 Gigabit Ethernet Systems
•
Forward Error Correction Systems
•
Optical Transport Network (OTN) Systems
OKI Electric Industry Co., Ltd Optical Component Company
1
OC-192/STM-64 SERDES Transceiver Module Specification; OAT1049x-V5-z-yy
Document NO: QPS-0302-006
Rev. DRAFT 0.4
1.Block
Diagram
1.
MOD_RESET
ALM INT
WDT_ALM
EEPROM_ALM
TxRESET
TxALM INT
TxFIFO ERR
TxDin[0:15]P/N
TxPICLKP/N
TxPICLKSEL
TxFIFO RES
TxSKEWSEL1/0
LsPOWMON
LsBIASMON
LsTEMPMON
DFB-LD
Controller
LsPOWALM
LsBIASALM
LsTEMPALM
LsENABLE
DFB-LD
16
16
FIFO
2
Automatic
Bias
Controller
CMU
2
Jitter
Filter
APD
Controller
16
16:1MUX
Driver
LN-M
OC192 Optical
Output
ModBIASALM
TxREFSEL
[1]
TxLOCKERR
TxPCLKP/N
TxMCLKP/N
TxRATESEL1/0
[1]
TxREFCLKP/N
RxPOWALM
APD_FAIL_ALM
RxPOWMON
RxDout[0:15]P/N
RxPOCLKP/N
RxMCLKP/N
RxMUTE Dout
RxLCKREF
RxREFSEL
RxMUTEPOCLK
RxMUTEMCLK
RxLOCKERR
RxSIGALM
RxRATESEL1/0
RxREFCLKP/N
DEMUX with CDR
APD
PreAmp
OC192 Optical
Input
RxALM INT
2
+3.3V
+1.8V
-5.2V
GND
Note[1]: TxREFSEL and TxRATESEL1/0 are available for multi-rate type, OAT1049x-V5-C-yy
Figure 1.1 Block Diagram
OKI Electric Industry Co., Ltd Optical Component Company
2
OC-192/STM-64 SERDES Transceiver Module Specification; OAT1049x-V5-z-yy
Document NO: QPS-0302-006
Rev. DRAFT 0.4
2.Absolute
Maximum Ratings
2.
Parameter
Supply Voltage
LVDS Output Pin
LVTTL Output Pin
Optical Input Power
Tension of Fiber
Fiber Bending Radius
Storage Temperature
Table 2.1 Absolute Maximum Ratings
Symbol
Min.
Max.
Vcc
Vdd
Vee
-0.5
-0.5
-5.75
0
0
25
-40
+3.8
+2.0
+0.5
+2.0
+3.6
+3
500
85
Unit
V
V
V
V
V
dBm
gf
mm
°
C
Pin
Tstg
3.Operating Environment
Parameter
Supply Voltage
Table 3.1 Operating Environment
Symbol
Min.
Typ.
Vcc
Vdd
Vee
Icc
Idd
Iee
Tc
3.13
1.71
-5.46
0
3.3
1.8
-5.2
0.7
0.8
0.4
6
Max.
3.46
1.89
-4.94
1.6
0.9
0.5
70
9
Unit
V
V
V
A
A
A
°
C
W
Supply Current
Case Temperature
Power Consumption
4.Specifications
4.
4-1 Optical Interfaces
Parameter
Transmitter
Optical Output Power
Optical Waveform
Center Wavelength
Extinction Ratio
Spectral Maximum –20dB Width
Side Mode Suppression Ratio
λc
Er
∆λ
20
SMSR
Pin
Pin
λc_rx
Table 4.1.1 Optical Interfaces
Symbol
Min.
Max.
Pout
+2
+6
OC-192/STM-64
Unamplified Mask Standard
1530
1565
10
1.0
35
-5
1280
27
-22
1580
0.1
Unit
dBm
Note
See Figure 4.1.1
nm
dB
nm
dB
dBm
dBm
nm
dB
UIp-p
BER=1x10
-12
@PRBS2
31
-1
Receiver
Minimum Sensitivity
Minimum Overload
Input Wavelength
Rx Return Loss
Jitter Performance
Jitter Generation
Jitter Tolerance and Transfer
Compliant with GR-253
D
Lrmax
1600
2
ps/nm
dB
Bandpass filter; 50k to
80MHz
See Figure 4.1.2, 4.1.3
Optical Path
Dispersion
Optical Path Penalty
OKI Electric Industry Co., Ltd Optical Component Company
3
OC-192/STM-64 SERDES Transceiver Module Specification; OAT1049x-V5-z-yy
Document NO: QPS-0302-006
Rev. DRAFT 0.4
1.25
1
0.75
Amplitude
Logic 1
0.25
0
-0.25
Time(UI)
Figure 4.1.1 Eye Pattern Mask
0
1
0.2
Logic 0
Input Jitter Amplitude [UIpp]
15
Acceptable Range
slope=-20dB/decade
1.5
slope=-20dB/decade
0.15
10
2k
20k
400k
4M
Jitter Frequency [Hz]
Figure 4.1.2 Jitter
Tolerance Mask
0.1
Jitter Gain [dB]
slope=-20dB/decade
Acceptable Range
120k
Frequency [Hz]
Figure 4.1.3
Jitter Transfer Mask
OKI Electric Industry Co., Ltd Optical Component Company
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OC-192/STM-64 SERDES Transceiver Module Specification; OAT1049x-V5-z-yy
Document NO: QPS-0302-006
Rev. DRAFT 0.4
4-2 Electrical Interfaces
Name
Parameter
Transmitter Reference Clock
Table 4.2.1 Reference Clock Characteristics
Min.
Typ
Max.
Unit
Logic
622.08
155.52
[2]
644.53
161.13
[2]
666.51
166.63
[2]
669.33
167.33
[2]
155.52/161.13/166.63/167.33
or
622.08/644.53/666.51/669.33
-20
-20
-100
+100
40
60
200
900
155.52 or 622.08
161.13 or 644.53
166.63 or 666.51
167.33 or 669.33
155.52/161.13/166.63/167.33
or
622.08/644.53/666.51/669.33
-20
+20
-100
+100
40
60
200
900
Notes
OC-192/STM-64
10GbE
FEC
Frequency
TxREFCLKP/N
MHz
AC
Coupled
Multi-rate type
[3]
ppm
%
mV p-p
OC-192/STM-64
10GbE
Single-ended voltage swing
OC-192/STM-64
10GbE
FEC
OTN
AC
Multi-rate type
Coupled
ppm
%
mV p-p
OC-192/STM-64
10GbE
Single-ended voltage swing
OTN
Frequency
Tolerance
Duty Cycle
Input Level
Receiver Reference Clock
Frequency
RxREFCLKP/N
Frequency
Tolerance
Duty Cycle
Input Level
MHz
Note[2]: Though 622MHz operation of TxREFCLK is standard, 155MHz operation is also available.
Note[3]: Multi-rate type, OAT1049x-V5-C-yy can select 155MHz or 622MHz.
Name
Transmitter
TxDin[0:15]P/N
TxPICLKP/N
TxPCLKP/N
Function
Table 4.2.2 Data/Clock Interfaces
I/O Logic
I
I
O
O
O
LVDS
LVDS
LVDS
LVDS
LVDS
Note
TxDin0: LSB
TxDin15: MSB
Transmitter 16 bit parallel data input
Transmitter source synchronous parallel input
clock
Transmitter parallel output clock
Receiver 16 bit parallel data output
Receiver source synchronous parallel output
clock
Receiver
RxDout[0:15]P/N
RxPOCLKP/N
RxDout0: LSB
RxDout15: MSB
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