SN74AUP1G00DCKRG4 datasheet, PDF

SN74AUP1G00DCKRG4: DescriptionLow-Power Single Two-Input Positive-NAND Gate 5-SC70 -40 to 85; Categorylogic logic; File Size2MB，36 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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Low-Power Single Two-Input Positive-NAND Gate 5-SC70 -40 to 85

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SOIC
package instruction	TSSOP, TSSOP5/6,.08
Contacts	5
Reach Compliance Code	compli
Factory Lead Time	6 weeks
Samacsys Descripti	Logic Gates Lo PWR SNGL 2Input Pos NAND Gate
series	AUP/ULP/V
JESD-30 code	R-PDSO-G5
JESD-609 code	e4
length	2 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.004 A
Humidity sensitivity level	1
Number of functions	1
Number of entries	2
Number of terminals	5
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP5/6,.08
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	1.2/3.3 V
Maximum supply current (ICC)	0.0009 mA
Prop。Delay @ Nom-Su	27.1 ns
propagation delay (tpd)	27.1 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	1.25 mm

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