2SC5095
TOSHIBA Transistor Silicon NPN Epitaxial Planar Type
2SC5095
VHF~UHF Band Low Noise Amplifier Applications
•
•
Low noise figure, high gain.
NF = 1.8dB, |S
21e
|
2
= 7.5dB (f = 2 GHz)
Unit: mm
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics
Collector-base voltage
Collector-emitter voltage
Emitter-base voltage
Base current
Collector current
Collector power dissipation
Junction temperature
Storage temperature range
Symbol
V
CBO
V
CEO
V
EBO
I
B
I
C
P
C
T
j
T
stg
Rating
20
10
1.5
7
15
100
125
−55~125
Unit
V
V
V
mA
mA
mW
°C
°C
Note: Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual
reliability data (i.e. reliability test report and estimated failure rate,
etc).
JEDEC
JEITA
TOSHIBA
―
SC-70
2-2E1A
Weight: 0.006 g (typ.)
Microwave Characteristics
(Ta
=
25°C)
Characteristics
Transition frequency
Insertion gain
Symbol
f
T
⎪S
21e
⎪
(1)
⎪S
21e
⎪
(2)
NF (1)
NF (2)
2
2
Test Condition
V
CE
=
6 V, I
C
=
7 mA
V
CE
=
6 V, I
C
=
7 mA, f
=
1 GHz
V
CE
=
6 V, I
C
=
7 mA, f
=
2 GHz
V
CE
=
6 V, I
C
=
3 mA, f
=
1 GHz
V
CE
=
6 V, I
C
=
3 mA, f
=
2 GHz
Min
7
⎯
4.5
⎯
⎯
Typ.
10
13
7.5
1.4
1.8
Max
⎯
⎯
⎯
⎯
3.0
Unit
GHz
dB
Noise figure
dB
Electrical Characteristics
(Ta
=
25°C)
Characteristics
Collector cut-off current
Emitter cut-off current
DC current gain
Output capacitance
Reverse transfer capacitance
Symbol
I
CBO
I
EBO
h
FE
(Note 1)
C
ob
C
re
Test Condition
V
CB
=
10 V, I
E
=
0
V
EB
=
1 V, I
C
=
0
V
CE
=
6 V, I
C
=
7 mA
V
CB
=
10 V, I
E
=
0, f
=
1 MHz (Note 2)
Min
⎯
⎯
50
⎯
⎯
Typ.
⎯
⎯
⎯
0.5
0.4
Max
1
1
160
⎯
0.85
pF
pF
Unit
μA
μA
Note 1: h
FE
classification R: 50~100, O: 80~160
Note 2: C
re
is measured by 3 terminal method with capacitance bridge.
1
2007-11-01
FPGA/CPLD
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