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IDT74FCT810CTQG8

Description
Low Skew Clock Driver, FCT Series, 5 True Output(s), 5 Inverted Output(s), CMOS, PDSO20, GREEN, QSOP-20
Categorylogic    logic   
File Size59KB,6 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric View All

IDT74FCT810CTQG8 Overview

Low Skew Clock Driver, FCT Series, 5 True Output(s), 5 Inverted Output(s), CMOS, PDSO20, GREEN, QSOP-20

IDT74FCT810CTQG8 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeQSOP
package instructionGREEN, QSOP-20
Contacts20
Reach Compliance Codecompliant
Other featuresONE BANK WITH ALL TRUE OUTPUTS & OTHER WITH ALL INVERTED OUTPUTS
seriesFCT
Input adjustmentSCHMITT TRIGGER
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length8.65 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Number of functions2
Number of inverted outputs5
Number of terminals20
Actual output times5
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)4.3 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.6 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3.9116 mm
IDT74FCT810BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL TEMPERATURE RANGE
FAST CMOS
BUFFER/CLOCK DRIVER
IDT74FCT810BT/CT
FEATURES:
0.5 MICRON CMOS Technology
Guaranteed low skew < 600ps (max.)
Very low duty cycle distortion < 700ps (max.)
Low CMOS levels
TTL compatible inputs and outputs
TTL level output voltage swings
High drive: -32mA I
OH
, +48mA I
OL
Two independent output banks with 3-state control:
– One 1:5 inverting bank
– One 1:5 non-inverting bank
• Available in QSOP, SSOP, and SOIC packages
DESCRIPTION:
The 74FCT810T is a dual bank inverting/ non-inverting clock driver
built using advanced dual metal CMOS technology. It consists of two banks
of drivers, one inverting and one non-inverting. Each bank drives five output
buffers from a standard TTL-compatible input. The FCT810T has low output
skew, pulse skew and package skew. Inputs are designed with hysteresis
circuitry for improved noise immunity. The outputs are designed with TTL
output levels and controlled edge rates to reduce signal noise. The part has
multiple grounds, minimizing the effects of ground inductance.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
OB
1
OB
2
OB
3
GND
OB
4
OB
5
GND
OE
B
IN
B
OE
A
5
IN
A
OA
1
-O A
5
OA
1
OA
2
OA
3
GND
OA
4
OE
B
OA
5
5
IN
B
O B
1
-O B
5
GND
OE
A
IN
A
QSOP/ SOIC/ SSOP
TOP VIEW
COMMERCIAL TEMPERATURE RANGE
1
c
2001
Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MAY 2010
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