LF351DR datasheet, PDF - EEWORLD Datasheet

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Datasheet> All Categories > Analog mixed-signal IC> Amplifier circuit> LF351DR

LF351DR: DescriptionOP-AMP, 13000uV OFFSET-MAX, 3MHz BAND WIDTH, PDSO8, SO-8; CategoryAnalog mixed-signal IC Amplifier circuit; File Size45KB，3 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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LF351DR Overview

OP-AMP, 13000uV OFFSET-MAX, 3MHz BAND WIDTH, PDSO8, SO-8

LF351DR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	SOIC
package instruction	SOP, SOP8,.25
Contacts	8
Reach Compliance Code	not_compliant
ECCN code	EAR99
Amplifier type	OPERATIONAL AMPLIFIER
Architecture	VOLTAGE-FEEDBACK
Maximum average bias current (IIB)	0.0002 µA
Maximum bias current (IIB) at 25C	0.0002 µA
Minimum Common Mode Rejection Ratio	70 dB
Nominal Common Mode Rejection Ratio	100 dB
frequency compensation	YES
Maximum input offset current (IIO)	0.004 µA
Maximum input offset voltage	13000 µV
JESD-30 code	R-PDSO-G8
length	4.9 mm
low-bias	YES
low-dissonance	NO
Negative supply voltage upper limit	-18 V
Nominal Negative Supply Voltage (Vsup)	-15 V
Number of functions	1
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	+-15 V
Certification status	Not Qualified
Maximum seat height	1.75 mm
minimum slew rate	8 V/us
Nominal slew rate	13 V/us
Maximum slew rate	3.4 mA
Supply voltage upper limit	18 V
Nominal supply voltage (Vsup)	15 V
surface mount	YES
technology	JFET
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Nominal Uniform Gain Bandwidth	3000 kHz
Minimum voltage gain	15000
width	3.9 mm

LF351DR Related Products

	LF351DR	LF351P
Description	OP-AMP, 13000uV OFFSET-MAX, 3MHz BAND WIDTH, PDSO8, SO-8	OP-AMP, 13000uV OFFSET-MAX, 3MHz BAND WIDTH, PDIP8, PLASTIC, DIP-8
Is it Rohs certified?	incompatible	incompatible
Maker	Texas Instruments	Texas Instruments
Parts packaging code	SOIC	DIP
package instruction	SOP, SOP8,.25	DIP, DIP8,.3
Contacts	8	8
Reach Compliance Code	not_compliant	not_compliant
ECCN code	EAR99	EAR99
Amplifier type	OPERATIONAL AMPLIFIER	OPERATIONAL AMPLIFIER
Architecture	VOLTAGE-FEEDBACK	VOLTAGE-FEEDBACK
Maximum average bias current (IIB)	0.0002 µA	0.0002 µA
Maximum bias current (IIB) at 25C	0.0002 µA	0.0002 µA
Minimum Common Mode Rejection Ratio	70 dB	70 dB
Nominal Common Mode Rejection Ratio	100 dB	100 dB
frequency compensation	YES	YES
Maximum input offset current (IIO)	0.004 µA	0.004 µA
Maximum input offset voltage	13000 µV	13000 µV
JESD-30 code	R-PDSO-G8	R-PDIP-T8
length	4.9 mm	9.81 mm
low-bias	YES	YES
low-dissonance	NO	NO
Negative supply voltage upper limit	-18 V	-18 V
Nominal Negative Supply Voltage (Vsup)	-15 V	-15 V
Number of functions	1	1
Number of terminals	8	8
Maximum operating temperature	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	DIP
Encapsulate equivalent code	SOP8,.25	DIP8,.3
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
power supply	+-15 V	+-15 V
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	5.08 mm
minimum slew rate	8 V/us	8 V/us
Nominal slew rate	13 V/us	13 V/us
Maximum slew rate	3.4 mA	3.4 mA
Supply voltage upper limit	18 V	18 V
Nominal supply voltage (Vsup)	15 V	15 V
surface mount	YES	NO
technology	JFET	JFET
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	THROUGH-HOLE
Terminal pitch	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
Nominal Uniform Gain Bandwidth	3000 kHz	3000 kHz
Minimum voltage gain	15000	15000
width	3.9 mm	7.62 mm

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