MX29VS128F
MX29VS128F
Read While Write Flash Memory
MULTIPLEXED, Burst Mode
P/N: PM1679
REV. 1.4, OCT. 21, 2015
Multi-bank, Read While Write Flash Memory
Contents
1. FEATURES........................................................................................................................................5
2. GENERAL INFORMATION ..............................................................................................................7
2-1.
2-2.
2-4.
Operating Speeds ..................................................................................................................7
Ordering Information.............................................................................................................7
Part Name Description ..........................................................................................................8
3. PIN CONFIGURATION / SYMBOL DESCRIPTION..........................................................................9
3-1.
3-2.
Logic Symbol .........................................................................................................................9
Pin Descriptions ..................................................................................................................10
4. BLOCK DIAGRAM ..........................................................................................................................11
4-1.
Table 1-1. Sector Address Table (Top Boot) ......................................................................................... 13
Table 1-2. Sector Address Table (Bottom Boot) ................................................................................... 15
Block & Address Structure .................................................................................................12
5. BUS OPERATIONS.........................................................................................................................17
Table 2. Bus Operations ....................................................................................................................... 17
5-1.
Table 3-1. Status Register .................................................................................................................... 18
Table 3-2. Status Register - Erase Suspend ........................................................................................ 18
Table 3-3. Status Register - Erase Status ............................................................................................ 19
Table 3-4. Status Register - Program Status........................................................................................ 19
Table 3-5. Status Register - Program Suspend.................................................................................... 19
Table 3-6. Status Register - Protect Status .......................................................................................... 20
Status Register ....................................................................................................................18
5-2.
5-3.
5-4.
Blank Check .........................................................................................................................20
Non-Burst (Asynchronous) Read Operation.....................................................................20
5-4-1. Burst Mode - Continuous Linear ................................................................................................ 21
Table 4-1. Address Latency for 10-13 Dummy Cycles ......................................................................... 21
Table 4-2. Address Latency for 9 Dummy Cycles ................................................................................ 21
Table 4-3. Address Latency for 8 Dummy Cycles ................................................................................ 22
Table 4-4. Address Latency for 7 Dummy Cycles ................................................................................ 22
Table 4-5. Address Latency for 6 Dummy Cycles ................................................................................ 22
Table 4-6. Address Latency for 5 Dummy Cycles ................................................................................ 22
Table 4-7. Address Latency for 4 Dummy Cycles ................................................................................ 23
Table 4-8. Address Latency for 3 Dummy Cycles ................................................................................ 23
5-4-2. Linear Burst Mode - 8/16 Word with Wrap Around .................................................................... 23
Table 5. Burst Address Groups ............................................................................................................ 23
5-4-3. Reading Memory Array .............................................................................................................. 24
Figure 1. Back-to-Back Read/Write Cycle Timings .............................................................................. 24
2
REV. 1.4, OCT. 21, 2015
Burst (Synchronous) Read Operation ..............................................................................20
P/N: PM1679
MX29VS128F
5-5.
Program Operation ..............................................................................................................25
5-5-1. Write Buffer Programming Operation......................................................................................... 26
5-5-2. Accelerated Program Operations............................................................................................... 26
Table 6. Write Buffer Programming Command Sequence ................................................................... 27
Figure 2. Write Buffer Programming Operation .................................................................................... 27
5-6-1. Sector Erase ............................................................................................................................. 28
5-6-2. Chip Erase ................................................................................................................................ 28
5-6-3. Accelerated Sector Erase .......................................................................................................... 28
Figure 3. Erase Operation .................................................................................................................... 29
5-6.
Erase Operation ..................................................................................................................28
5-7.
5-7-1. Program Suspend/Program Resume......................................................................................... 29
5-7-2. Erase Suspend/Erase Resume ................................................................................................. 30
Table 7. Configuration Register
............................................................................................................ 31
Program/Erase Suspend/Resume ......................................................................................29
5-8. Configuration Register .......................................................................................................31
5-8-1. Set Configuration Register Command Sequence
...................................................................... 32
5-8-2. Configurable Dummy Cycle
....................................................................................................... 32
5-8-3. Burst Length Configuration
........................................................................................................ 32
Table 8. Configuration Dummy Cycles vs Frequency
.......................................................................... 33
5-8-4. Output Drive Strength
................................................................................................................ 33
Figure 4. Example of Programmable Dummy Cycles .......................................................................... 33
5-9.
5-9-1. Program Secured Silicon Sector Command Sequence ............................................................. 34
Enter/Exit Secured Silicon Sector Command Sequence .................................................34
5-10. Handshaking Feature ..........................................................................................................34
6. SECURITY FEATURES ..................................................................................................................35
6-1.
6-2.
6-3.
6-4.
6-5.
Sector Protect/Un-protect ...................................................................................................35
Sector Protect Range ..........................................................................................................35
Hardware Protect .................................................................................................................35
SSS Lock Bits ......................................................................................................................36
6-5-1. Factory Locked Region: Secured Silicon Sector Programmed and Protected at the Factory ... 36
6-5-2. Customer Lockable Region: Secured Silicon Sector NOT Programmed or Protected at the Factory....... 37
Secured Silicon Sector Flash Memory Region ..............................................................36
7. COMMAND DEFINITIONS .............................................................................................................38
8. ENERGY SAVING MODE ..............................................................................................................41
8-1.
8-2.
8-3.
Standby Mode ......................................................................................................................41
Automatic Sleep Mode ........................................................................................................41
Table 9. DC Characteristics.................................................................................................................. 42
8-3-1. Hardware Reset ......................................................................................................................... 43
3
REV. 1.4, OCT. 21, 2015
Output Disable .....................................................................................................................41
P/N: PM1679
Multi-bank, Read While Write Flash Memory
Table 10. Hardware Reset.................................................................................................................... 43
Figure 5. Reset Timings ....................................................................................................................... 43
8-3-2. Software Reset .......................................................................................................................... 43
9. Device ID and COMMON FLASH MEMORY INTERFACE (CFI) MODE .......................................44
Table 11-1. ID/CFI Mode: Device ID
..................................................................................................... 44
Table 11-2. ID/CFI Mode: Identification Data Values
............................................................................ 45
Table 11-3. ID/CFI Mode: System Interface Data Values
..................................................................... 45
Table 11-4. CFI Mode: Device Geometry Data Values
......................................................................... 46
Table 11-5. CFI Mode: Primary Vendor-Specific Extended Query Data Values
................................... 47
Table 11-6. CFI Mode: ID/CFI Data ..................................................................................................... 48
10. ELECTRICAL CHARACTERISTICS...............................................................................................49
10-1. Absolute Maximum Stress Ratings ...................................................................................49
10-2. Operating Temperatures and Voltages ..............................................................................49
10-3. Test Conditions....................................................................................................................50
Figure 6. Test Setup ............................................................................................................................. 50
Figure 7. Input Waveforms and Measurement Levels..........................................................................
50
Figure 8. VCC Power-up Diagram
....................................................................................................... 51
Figure 9. Deep Power Down Mode Waveform
.................................................................................... 52
Figure 10. CLK Characterization .......................................................................................................... 52
Table 12. Synchronous / Burst Read.................................................................................................... 53
Figure 11. Burst Mode Read ................................................................................................................ 53
Table 13. Asynchronous Read ............................................................................................................. 54
Figure 12. Asynchronous Mode Read .................................................................................................. 54
Table 14. Erase/Program Operations ................................................................................................... 55
Figure 13. Program Operation Timings ................................................................................................ 56
Figure 14. Chip/Sector Erase Operations ............................................................................................ 57
Figure 15. 8-, 16-Word Linear Burst Address Wrap Around ................................................................. 58
Figure 16. Latency with Boundary Crossing ........................................................................................ 58
10-5-1. BGA Ball Capacitance ............................................................................................................. 60
10-4. AC Characteristics ..............................................................................................................51
10-5. Erase and Programming Performance ..............................................................................59
10-6. Low VCC Write Prohibit ......................................................................................................60
10-6-1. Write Pulse "Glitch" Protection ................................................................................................ 60
10-6-2. Logical Prohibit ........................................................................................................................ 60
10-6-3. Power-up Sequence ................................................................................................................ 60
10-6-4. Power-up Write Prohibit ........................................................................................................... 60
10-6-5. Power Supply Decoupling........................................................................................................ 60
11. PACKAGE INFORMATION .............................................................................................................61
12. REVISION HISTORY ......................................................................................................................63
P/N: PM1679
4
REV. 1.4, OCT. 21, 2015
MX29VS128F
128M-BIT [8M x16-bit] CMOS 1.8 Volt,
1. FEATURES
Characteristics
Burst Length
• Burst Mode - Continuous linear
• Linear burst length - 8/16 word with wrap
around
Multiplexed, Burst Mode Flash Memory
Performance
High Performance
• 30 μs - Word programming time
• 7.5 μs - Effective word programming time
utilizing a 32 word Write Buffer at VCC
level
• 2.5 μs - Effective word programming time
of utilizing a 32 word Write Buffer at ACC
level
Sector Architecture
• Multi-bank Architecture (8 banks)
• Read while write operation
• Four 16 Kword sectors on top/ bottom of
address range
• 127 sectors are 64 KWord sectors
Sector Erase Time
• 500 ms for 16 Kword sectors
• 1000 ms for 64 Kword sectors
Power Supply Operations
• 1.8V for read, program and erase
operations (1.70V to 1.95V)
• Deep power down mode
Read Access Time
• Burst access time: 7 ns (at industrial
temperature range)
• Asynchronous random access time: 80 ns
• Synchronous random access time: 75 ns
Secure Silicon Sector Region
• 128 words for the factory & customer
secure silicon sector
Power Dissipation
• Typical values: 8 bits switching,
CL = 10 pF at 108 MHz, CIN excluded
• 20 mA for Continuous burst read mode
• 30 mA for Program/Erase Operations (max.)
• 30 uA for Standby mode
Program/Erase Cycles
• 100,000 cycles typical
Data Retention
• 20 years
P/N: PM1679
5
REV. 1.4, OCT. 21, 2015
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