®
SP488/489
Quad RS-485/RS-422 Line Receivers
s
s
s
s
s
s
s
s
RS-485 or RS-422 Applications
Quad Differential Line Receivers
Tri–state Output Control
120ns Typical Receiver Propagation
Delays
–7V to +12V Common Mode Input
Range
1mA Supply Current
Single +5V Supply Operation
Pin Compatible with SN75173,
SN75175, LTC488 and LTC489
DESCRIPTION…
The
SP488
and
SP489
are low–power quad differential line receivers meeting RS-485 and RS-422
standards. The
SP488
features a common receiver enable control; the
SP489
provides independent
receiver enable controls for each pair of receivers. Both feature tri–state outputs and wide common–
mode input range. The receivers have a fail–safe feature which forces a logic “1” output when receiver
inputs are left floating. Both are available in 16–pin plastic DIP and SOIC packages.
RI
1
B
RI
1
A
RO
1
EN
RO
2
RI
2
A
RI
2
B
GND
1
2
3
4
5
6
7
8
SP488
1
4
16
15
14
13
12
V
CC
RI
4
B
RI
4
A
RO
4
EN
RO
3
RI
3
A
RI
3
B
RI
1
B
RI
1
A
RO
1
EN
1
/EN
2
RO
2
RI
2
A
RI
2
B
GND
1
2
3
4
5
6
7
8
SP489
1
4
16
15
14
13
12
V
CC
RI
4
B
RI
4
A
RO
4
EN
3
/EN
4
RO
3
RI
3
A
RI
3
B
2
3
11
10
9
2
3
11
10
9
SP488/489
Quad RS-485/RS-422 Line Receivers
© Copyright 2000 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device
at these or any other above those indicated in the operation
sections of the specifications below is not implied. Exposure to
absolute maximum rating conditions for extended periods of time
may affect reliability.
V
CC
............................................................................................ +7V
Input Voltages
Logic ............................................................. –0.5V to (V
CC
+0.5V)
Receiver ...............................................................................
±14V
Receiver Output Voltage ................................. –0.5V to (V
CC
+0.5V)
Input Currents
Logic ..................................................................................
±25mA
Storage Temperature ............................................ –65°C to +150°C
Power Dissipation
Plastic DIP ........................................................................ 375mW
(derate 7mW/°C above +70°C)
Small Outline .................................................................... 375mW
(derate 7mW/°C above +70°C)
Lead Temperature (soldering, 10 sec) ................................... 300°C
SPECIFICATIONS
V
CC
= 5V±5%; typicals at 25°C; T
MIN
≤
T
A
≤
T
MAX
unless otherwise noted.
PARAMETER
DC CHARACTERISTICS
Digital Inputs
Voltage
V
IL
V
IH
Input Current
RECEIVER INPUTS
Input Resistance
Differential Input Threshold
Input Current (A, B)
MIN.
TYP.
MAX.
UNIT
CONDITIONS
EN, EN, EN
1
/EN
2
, EN
3
/EN
4
0.8
2.0
±2
Volts
Volts
µA
0V
≤
V
IN
≤
V
CC
12
–0.2
+0.2
+1.0
–0.8
kOhm
Volts
mA
mA
Mbps
Maximum Data Rate
10
RECEIVER OUTPUTS
Output Voltage
V
OH
3.5
V
OL
0.4
High Impedance Output Current
±1
POWER REQUIREMENTS
Supply Voltage
4.75
5.00
5.25
Supply Current
1
5
ENVIRONMENTAL AND MECHANICAL
Operating Temperature
–C
0
+70
–E
–40
+85
Storage Temperature
–65
+150
Package
–_S
16–pin Plastic DIP
–_T
16–pin SOIC
–7V
≤
V
CM
≤
12V
–7V
≤
V
CM
≤
12V
V
CC
= 0V or 5.25V; I
IN2
V
IN
= +12V
V
IN
= –7V
V
V
µA
Volts
mA
V
CC
= maximum; 0.4V
≤
V
O
≤
2.4V
I
O
= –4mA; V
ID
= +0.2V
I
O
= +4mA; V
ID
= –0.2V
No load
°C
°C
°C
SP488/489
Quad RS-485/RS-422 Line Receivers
© Copyright 2000 Sipex Corporation
2
100pF EN
A
DI
DRIVER
B
54Ω
RCVR
ROn
C
L
100pF
EN
1/4 SP486
1/4 SP488
S
1
RCVR
C
L
1kΩ
S
2
1kΩ
V
CC
Figure 1. Timing Test Circuit
Figure 2. Enable/Disable Timing Test Circuit
SP488 PINOUT
Pin 1 — RI
1
B — Receiver 1 input B.
Pin 2 — RI
1
A
—
Receiver 1 input A.
Pin 3 — RO
1
— Receiver 1 Output — If Re-
ceiver 1 output is enabled, if RI
1
A > RI
1
B by
200mV, Receiver output is high. If Receiver 1
output is enabled, and if RI
1
A < RI
1
B by 200mV,
Receiver 1 output is low.
Pin 4 — EN — Receiver Output Enable. Please
refer to SP488
Truth Table (1).
Pin 5 — RO
2
— Receiver 2 Output — If Re-
ceiver 2 output is enabled, if RI
2
A > RI
2
B by
200mV, Receiver 2 output is high. If Receiver 2
output is enabled, and if RI
2
A < RI
2
B by
200mV, Receiver 2 output is low.
PINOUT
Pin 6 — RI
2
A — Receiver 2 input A.
Pin 7 — RI
2
B — Receiver 2 input B.
Pin 8 — GND — Digital Ground.
Pin 9 — RI
3
B — Receiver 3 input B.
Pin 10 — RI
3
A — Receiver 3 input A.
Pin 11 — RO
3
— Receiver 3 Output — If
Receiver 3 output is enabled, if RI
3
A > RI
3
B by
200mV, Receiver 3 output is high. If Receiver 3
output is enabled, and if RI
3
A < RI
3
B by
200mV, Receiver 3 output is low.
Pin 12 — EN — Receiver Output Enable. Please
refer to SP488 Truth Table (1).
RI
1
B
RI
1
A
RO
1
EN
RO
2
RI
2
A
RI
2
B
GND
1
2
3
4
5
6
7
8
SP488
1
4
16
15
14
13
12
V
CC
RI
4
B
RI
4
A
RO
4
EN
RO
3
RI
3
A
RI
3
B
RI
1
B
RI
1
A
RO
1
EN
1
/EN
2
RO
2
RI
2
A
RI
2
B
GND
1
2
3
4
5
6
7
8
SP489
1
4
16
15
14
13
12
V
CC
RI
4
B
RI
4
A
RO
4
EN
3
/EN
4
RO
3
RI
3
A
RI
3
B
2
3
11
10
9
2
3
11
10
9
SP488/489
Quad RS-485/RS-422 Line Receivers
© Copyright 2000 Sipex Corporation
3
Pin 13 — RO
4
— Receiver 4 Output — If
Receiver 4 output is enabled, if RI
4
A > RI
4
B by
200mV, Receiver 4 output is high. If Receiver 4
output is enabled, and if RI
4
A < RI
4
B by
200mV, Receiver 4 output is low.
Pin 14 — RI
4
A — Receiver 4 input A.
Pin 15 — RI
4
B — Receiver 4 input B.
Pin 16 — Supply Voltage V
CC
— 4.75V
≤
V
CC
≤
5.25V.
SP489 PINOUT
Pin 1 — RI
1
B — Receiver 1 input B.
Pin 2 — RI
1
A — Receiver 1 input A.
Pin 3 — RO
1
— Receiver 1 Output — If Re-
ceiver 1 output is enabled, if RI
1A
> RI
1
B by
200mV, Receiver output is high. If Receiver 1
output is enabled, and if RI
1
A < RI
1
B by 200mV,
Receiver 1 output is low.
Pin 4 — EN1/EN2 — Receiver 1 and 2 Output
Enable. Please refer to SP489
Truth Table (2).
Pin 5 — RO
2
— Receiver 2 Output — If Re-
ceiver 2 output is enabled, if RI
2
A > RI
2
B by
200mV, Receiver 2 output is high. If Receiver 2
output is enabled, and if RI
2
A < RI
2
B by
200mV, Receiver 2 output is low.
Pin 6 — RI
2
A — Receiver 2 input A.
Pin 7 — RI
2
B — Receiver 2 input B.
Pin 8 — GND — Digital Ground.
Pin 9 — RI
3
B — Receiver 3 input B.
Pin 10 — RI
3
A — Receiver 3 input A.
Pin 11 — RO
3
— Receiver 3 Output — If
Receiver 3 output is enabled, if RI
3
A > RI
3
B by
200mV, Receiver 3 output is high. If Receiver 3
output is enabled, and if RI
3
A < RI
3
B by
200mV, Receiver 3 output is low.
Pin 12 — EN3/EN4 — Receiver 3 and 4 Output
Enable. Please refer to SP489 Truth Table (2).
Pin 13 — RO
4
— Receiver 4 Output — If
Receiver 4 output is enabled, if RI
4
A > RI
4
B by
200mV, Receiver 4 output is high. If Receiver 4
output is enabled, and if RI
4
A < RI
4
B by
200mV, Receiver 4 output is low.
Pin 14 — RI
4
A — Receiver 4 input A.
Pin 15 — RI
4
B — Receiver 4 input B.
Pin 16 — Supply Voltage V
CC
— 4.75V
≤
V
CC
≤
5.25V.
FEATURES…
The
SP488
and
SP489
are low–power quad
differential line receivers meeting RS-485 and
RS-422 standards. The
SP488
features active
high and active low common receiver enable
controls; the
SP489
provides independent, ac-
tive high receiver enable controls for each pair
of receivers. Both feature tri–state outputs and a
-7V to +12V common–mode input range per-
mitting a
±7V
ground difference between de-
vices on the communications bus. The
SP488/
489
are equipped with a fail–safe feature which
forces a logic high at the receiver output when
the input is left floating. Data rates up to 10Mbps
are supported. Both are available in 16-pin
plastic DIP and SOIC packages.
DIFFERENTIAL
A–B
V
ID
≥
0.2V
–0.2V < V
ID
< +0.2V
V
ID
≤
0.2V
X
ENABLES
EN
1
/EN
2
or EN
3
/EN
4
H
H
H
L
OUTPUT
RO
H
X
L
Hi–Z
DIFFERENTIAL
A–B
V
ID
≥
0.2V
–0.2V < V
ID
< +0.2V
V
ID
≤
0.2V
X
EN
H
X
H
X
H
X
L
ENABLES
EN
X
L
X
L
X
L
H
OUTPUT
RO
H
H
X
X
L
L
Hi–Z
Table 1. SP488 Truth Table
SP488/489
Table 2. SP489 Truth Table
Quad RS-485/RS-422 Line Receivers
© Copyright 2000 Sipex Corporation
4
AC PARAMETERS
V
CC
= 5V±5%; typicals at 25°C; 0°C
≤
T
A
≤
+70°C unless otherwise noted.
PARAMETER
MIN.
PROPAGATION DELAY
Receiver Input to Output
Low to HIGH (tPLH)
High to LOW (tPH
L
)
Differential Receiver Skew (t
SKD
)
Receiver Rise Time (t
R
)
SP488
SP489
Receiver Fall Time (t
F
)
SP488
SP489
RECEIVER ENABLE
To Output HIGH
To Output LOW
RECEIVER DISABLE
From Output LOW
From Output HIGH
TYP.
MAX.
UNIT
CONDITIONS
C
L
= 15pF;
Figure 1, 3
120
120
13
30
30
20
20
70
80
250
250
70
70
40
40
150
200
ns
ns
ns
ns
ns
10% to 90%
90% to 10%
ns
ns
ns
ns
C
L
= 15pF;
Figures 2 and 4
(S2 closed)
CL = 15pF;
Figures 2 and 4
(S1 closed)
CL = 15pF;
Figures 2 and 4
(S1 closed)
CL = 15pF;
Figures 2 and 4
(S2 closed)
70
70
150
150
ns
ns
Input A–B
+V
OD
–V
OD
t
PHL
F = 1MHZ: t
r
< 10ns: t
f
< 10ns
0V
t
PLH
0V
RO
V
OH
V
OL
1.5V
1.5V
Figure 3. Receiver Propagation Delays
3V
EN
0V
t
ZL
RO
5V
V
OL
t
ZH
RO
V
OH
0V
F = 1MHZ: t
r
< 10ns: t
f
< 10ns
1.5V
t
LZ
1.5V
1.5V
Output normally low
t
HZ
Output normally high
1.5V
0.5V
0.5V
Figure 4. Receiver Enable/Disable Timing
SP488/489
Quad RS-485/RS-422 Line Receivers
© Copyright 2000 Sipex Corporation
5
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