SCG2500
Synchronous Clock
Generators
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
General Description
The SCG2500 is a mixed-signal phase lock loop
generating CMOS outputs from an intrinsically low jitter
voltage controlled crystal oscillator.
The SCG2500 can lock to one of two possible input
reference frequencies at 8 kHz which is selectable
using one input select pin.
Further features include an alarm output to indicate
Loss of Reference, LOR, or Loss of Lock, LOL. If only
one of the references is lost, the unit will disable its
phase detector and will signal an alarm, but will not
switch reference automatically. If both references are
lost, the SCG2500 will enter a Free Run state which will
guarantee a 20 ppm accurate output. Additionally, the
Free Run mode may be entered manually by applying a
high signal to the Free Run pin. If the unit is in Free
Run mode, the Free Run status pin will be high.
The outputs may be put into the tri-state high
impedance condition for external testing purposes by
applying a high signal to the Reset/Tri-State pin.
The filtered 8 kHz is derived from the oscillator
output. The offset between the filtered output and the
reference input will change with each reference
rearrangement.
The package dimensions are .775” x .8” x .35” on a
six layer FR4 board with surface mount pins. Parts are
assembled using high temperature solder to withstand
surface mount reflow process.
Features
•
Phase Locked Output
Frequency Control
•
Intrinsically Low Jitter Crystal
Oscillator
•
Two Selectable References @ 8
kHz
•
Alarm Output
•
Tri-Statable Oscillator and Alarm
Outputs
•
Force Free Run Function
•
Automatic Free Run Operation
upon loss of both references
•
Input Duty Cycle Tolerant
•
3.3 Volt Power Supply
•
Small Size: 0.775 x 0.825 inches
•
Surface Mount, DIL Package
US Headquarters:
630-851-4722
European Headquarters:
+353-62-472221
Absolute Maximum Rating
Table 1
Symbol
V
CC
V
I
T
S
Parameter
Power Supply Voltage
Input Voltage
Storage Temperature
Minimum
-0.5
-0.5
-65.0
Nominal
-
-
-
Maximum
+4.0
+5.5
+150.0
Units
Volts
Volts
°C
Notes
Operating Specifications
Table 2
Parameter
Voltage
Current
Oscillator Output Frequencies
Temperature Range
Input Frequency Ref 1 and Ref 2
Input Jitter Tolerance
Jitter Bandwidth
Acquisition Time
Capture/Pull-In Range
Output Duty Cycle
Output Rise and Fall Time
Output Load
Alarm
Free Run Accuracy
Package
MTIE @ Synchronization Rearrangement
Specifications
3.3V ±5%
150 mA @ 3.46V
1.544, 2.048, 19.44, 20.48, 44.736, 51.84, and 77.76 MHz
0 to 70°C
8 kHz
6.25 us, 10 Hz (0.05 UI @ 8000 Hz)
< 10 Hz
Approximately 1 second
± 25 ppm Minimum
40/60 % Min/Max @ 50% Level
3 nS @ 20% to 80% output level
30 pF
LOR/LOL Status Signal Output
±20 ppm
Fr4 SM 0.825” x 0.775” x 0.330”
GR-253-CORE, 1999 R5-136
Notes
1.0
2.0
3.0
4.0, 4.1
Input and Output Characteristics
Table 3
Symbol
V
IH
V
IL
T
IO
C
OUT
V
HO
V
IO
T
IR
Parameter
High level input voltage
Low level input voltage
I/O to output valid
Output capacitance
High level output voltage loh = -4mA
Low Level output voltage lo1 = 8mA
Input reference signal pulse width
Minimum
2.0
0
-
-
2.40
-
30
Nominal
-
-
-
-
-
-
-
Maximum
5.5
0.8
10
10
-
0.4
-
Units
V
V
nS
pF
-
-
nS
Notes
Vcc Min
Vcc Max
Preliminary Data Sheet #:
SG027
© Copyright 2001 The Connor-Winfield Corp.
Page 2
of
8
Rev:
0
1
Date:
07/24/01
All Rights Reserved
Specifications subject to change without notice
Output Jitter Specifications
Table 4
Frequency (MHz)
1.544
2.048
19.44
20.48
34.368
44.736
51.84
77.76
All SCG2500 Models
Jitter BW 10 Hz - 1 MHz
pS (RMS)
m UI
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Sonnet Jitter BW 12 kHz - 20 MHz
pS (RMS)
m UI
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TB
TBD
TBD
TBD
TBD
TBD
TBD
Input Selection / Output Response
Table 5
INPUTS
Reset/
Tri-State
1
0
0
0
0
0
0
0
All SCG2500 Models
OUPUTS
REF
B
X
X
A
A
A
NA
NA
NA
SEL
AB
X
X
0
1
0
1
0
X
REF
A
X
X
A
NA
NA
A
A
NA
FR
X
1
0
0
0
0
0
0
FR
status
TS
1
0
0
0
0
0
1
Alarm
TS
1
0
1
1
1
0
1
Oscillator 8 kHz
Output
Output
TS
FR
LRB
U
LRB
U
LRA
FR
TS
FR
LRBD
U
LRBD
U
LRAD
FR
Notes
5.0
5.0
TS = Tri-State
FR = Free Run
LRA = Locked to Ref A
LRB = Locked to Reb B
U = Unstable
LRAD = Locked to Ref A and divided down
LRAB = Locked to ref B and divided down
X = Don’t cart
NOTES:
1.0
Requires external regulation
2.0
Externally selectable via Input Select AB
3.0
From a 10 ppm offset in reference frequency
4.0
Entry into Free Run doesn’t meet requirement for initial 2.33 seconds of self-timing
4.1
If the selected reference is removed, system response to the ALARM must be less than 10µs
5.0
On alarm assertion, switch references. If alarm is still active, force Free Run
Preliminary Data Sheet #:
SG027
© Copyright 2001 The Connor-Winfield Corp.
Page 3
of
8
Rev:
0
1
Date:
07/24/01
All Rights Reserved
Specifications subject to change without notice
Package Outline
Figure 1
Package Dimensions
Figure 2
0.700
0.775
0.100
PIN 1
0.090
0.825
0.333
0.018
Alarm Timing
Figure 3
Alarm upon Loss of Reference
REFERENCE
ALARM
Alarm upon Loss of Lock
EXT 8K REF
INT 8K REF
ALARM
Preliminary Data Sheet #:
SG027
© Copyright 2001 The Connor-Winfield Corp.
Page 4
of
8
}
< - 90
or
f
> 90 = 31.25us
F
Point at which -90 <
f
< 90
is held within that range
Rev:
0
1
Date:
07/24/01
All Rights Reserved
Specifications subject to change without notice
Block Diagram
Figure 4
FREE RUN STATUS
FREE RUN
ALARM
DPFD
8 kHz PHASE
ALIGNER
ANALOG
FILTER
LOW JITTER
VCXO
OSCILLATOR
OUTPUT #1
REFA
REFB
SELECT
AB
1/N
8 kHz
TRI-STATE
Circuit Board Footprint
Figure 5
0.800 (20.32mm)
0.640 (16.26mm)
0.080
(2.03mm)
0.050 TYP
(1.27mm)
Pin Connections
Table 6
Pin
1
2
3
0.100
TYP
(2.54mm)
Connection
Filtered 8 kHz Output
TCK
TMS
Ground
Free Run / TDI (1 = Free Run)
Alarm Output (1 = Alarm)
REF B
REB A
Oscillator Output
Free Run Status Pin (FR = 1)
Vcc
TDO
Reset / Tri-State
Input Frequency Select AB (A = 0, B = 1)
4
5
6
7
0.050 TYP
(1.27mm)
0.650
(16.51mm)
8
9
10
11
12
13
14
Preliminary Data Sheet #:
SG027
© Copyright 2001 The Connor-Winfield Corp.
Page 5
of
8
Rev:
0
1
Date:
07/24/01
All Rights Reserved
Specifications subject to change without notice
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