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CAT5221WI-50-T2

Description
DUAL 50K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO20, 0.300 INCH, ROHS COMPLIANT, MS-013, SOIC-20
CategoryAnalog mixed-signal IC    converter   
File Size193KB,15 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance  
Download Datasheet Parametric View All

CAT5221WI-50-T2 Overview

DUAL 50K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO20, 0.300 INCH, ROHS COMPLIANT, MS-013, SOIC-20

CAT5221WI-50-T2 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeSOIC
package instructionSOP, SOP20,.4
Contacts20
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresNONVOLATILE MEMORY
control interface2-WIRE SERIAL
Converter typeDIGITAL POTENTIOMETER
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length12.8 mm
Humidity sensitivity level1
Number of functions2
Number of positions64
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3/5 V
Certification statusNot Qualified
resistance lawLINEAR
Maximum resistor tolerance20%
Maximum resistor terminal voltage3 V
Minimum resistor terminal voltage
Maximum seat height2.64 mm
Nominal supply voltage3 V
surface mountYES
Nominal temperature coefficient300 ppm/°C
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
Nominal total resistance50000 Ω
width7.5 mm
CAT5221
Dual Digital
Potentiometer (POT)
with 64 Taps
and I
2
C Interface
Description
http://onsemi.com
The CAT5221 is two digital POTs integrated with control logic and
16 bytes of NVRAM memory. Each digital POT consists of a series of
63 resistive elements connected between two externally accessible end
points. The tap points between each resistive element are connected to
the wiper outputs with CMOS switches. A separate 6-bit control
register (WCR) independently controls the wiper tap switches for each
digital POT. Associated with each wiper control register are four 6-bit
non-volatile memory data registers (DR) used for storing up to four
wiper settings. Writing to the wiper control register or any of the
non-volatile data registers is via a I
2
C serial bus. On power-up, the
contents of the first data register (DR0) for each of the four
potentiometers is automatically loaded into its respective wiper
control register (WCR).
The CAT5221 can be used as a potentiometer or as a two terminal,
variable resistor. It is intended for circuit level or system level
adjustments in a wide variety of applications.
Features
TSSOP−20
Y SUFFIX
CASE 948AQ
SOIC−20
W SUFFIX
CASE 751BJ
PIN CONNECTIONS
R
W0
R
L0
R
H0
A0
A2
R
W1
R
L1
R
H1
SDA
GND
SOIC−20 (W)
TSSOP−20 (Y)
(Top View)
CAT5221
1
V
CC
NC
NC
NC
A1
A3
SCL
NC
NC
NC
Two Linear-taper Digital Potentiometers
64 Resistor Taps per Potentiometer
End to End Resistance 2.5 kW, 10 kW, 50 kW or 100 kW
Potentiometer Control and Memory Access via I
2
C Interface
Low Wiper Resistance, Typically 80
W
Nonvolatile Memory Storage for Up to Four Wiper Settings for Each
Potentiometer
Automatic Recall of Saved Wiper Settings at Power Up
2.5 to 6.0 Volt Operation
Standby Current less than 1
mA
1,000,000 Nonvolatile WRITE Cycles
100 Year Nonvolatile Memory Data Retention
20-lead SOIC and TSSOP Packages
Industrial Temperature Range
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
Semiconductor Components Industries, LLC, 2013
July, 2013
Rev. 14
1
Publication Order Number:
CAT5221/D
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