PD - 93984A
REPETITIVE AVALANCHE AND dv/dt RATED
HEXFET TRANSISTORS
SURFACE MOUNT (LCC-18)
Product Summary
Part Number
IRFE220
B
VDSS
100V
R
DS(on)
0.80Ω
I
D
2.8A
®
IRFE220
JANTX2N6790U
REF:MIL-PRF-19500/555
200V, N-CHANNEL
LCC-18
The leadless chip carrier (LCC) package represents the
logical next step in the continual evolution of surface
mount technology. Desinged to be a close replacement
for the TO-39 package, the LCC will give designers the
extra flexibility they need to increase circuit board density.
International Rectifier has engineered the LCC package
to meet the specific needs of the power market by
increasing the size of the bottom source pad, thereby
enhancing the thermal and electrical performance. The
lid of the package is grounded to the source to reduce
RF interference.
Features:
n
n
n
n
n
n
n
n
Surface Mount
Small Footprint
Alternative to TO-39 Package
Hermetically Sealed
Dynamic dv/dt Rating
Avalanche Energy Rating
Simple Drive Requirements
Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25°C Continuous Drain Current
ID @ VGS = 10V, TC = 100°C Continuous Drain Current
IDM
Pulsed Drain Current
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
For footnotes refer to the last page
300 (for 5s)
0.42(typical)
2.8
1.8
11
14
0.11
±20
0.242
2.2
1.4
5.0
-55 to 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
g
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1
08/07/07
IRFE220, JANTX2N6790U
Electrical Characteristics
@ Tj = 25°C (Unless Otherwise Specified)
Parameter
BVDSS
Drain-to-Source Breakdown Voltage
∆BV
DSS /∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Min
200
—
—
—
2.0
1.5
—
—
—
—
—
—
—
—
—
—
—
—
Typ Max Units
—
0.25
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6.1
—
—
0.80
0.85
4.0
—
25
250
100
-100
14.3
3.0
9.0
40
50
50
50
—
V
V/°C
Ω
V
S
µA
nA
nC
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, ID = 1.0mA
VGS = 10V, ID = 1.8A
VGS = 10V, ID = 2.8A
VDS = VGS, ID = 250µA
VDS > 15V, IDS = 1.8A
VDS = 160V, VGS = 0V
VDS = 160V
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS = 10V, ID = 2.8A
VDS = 100V
VDD = 74V, ID = 2.8A
VGS = 10V, RG = 7.5Ω
IGSS
IGSS
Qg
Q gs
Q gd
td
(on)
tr
td
(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
ns
nH
Measured from the center of
drain pad to center of source
pad
VGS = 0V, VDS = 25V
f = 1.0MHz
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
260
100
30
—
—
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
trr
Q RR
ton
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min Typ Max Units
—
—
—
—
—
—
—
—
—
—
2.8
11
1.5
400
4.3
A
V
ns
µC
Test Conditions
T
j
= 25°C, IS = 2.8A, VGS = 0V
Tj = 25°C, IF = 2.8A, di/dt
≤
100A/µs
VDD
≤
50V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
RthJ-PCB
Junction to Case
Junction to PC Board
Min Typ Max
—
—
—
—
8.93
26
Units
°C/W
Test Conditions
Soldered to a copper clad PC board
Note: Corresponding Spice and Saber models are available on International Rectifier Website.
For footnotes refer to the last page
2
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IRFE220, JANTX2N6790U
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRFE220, JANTX2N6790U
13 a & b
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRFE220, JANTX2N6790U
V
DS
V
GS
R
G
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
R
D
D.U.T.
+
-
V
DD
Fig 10a.
Switching Time Test Circuit
V
DS
90%
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5