size and cost of an HDSL or MDSL system by provid-
ing all of the active analog circuitry needed to connect
the Brooktree Bt8952 HDSL digital signal processor
to an external compromise hybrid and a 1:2 HDSL line
transformer. All internal filter responses as well as the
pulse former output scale with clock frequency—
allowing the AFE1103 to operate over a range of bit
rates from 196kbps to 1.168Mbps.
Functionally, this unit is separated into a transmit and
a receive section. The transmit section generates, fil-
ters, and buffers outgoing 2B1Q data. The receive
section filters and digitizes the symbol data received
on the telephone line and passes it to the Bt8952. The
HDSL Analog Interface is a monolithic device fabri-
cated on 0.6µCMOS. It operates on a single +5V
supply. It is housed in a 48-pin SSOP package. This
unit is second sourced by Brooktree’s Bt8921.
Pulse
Former
Line
Driver
txLINE
P
txLINE
N
PLL
OUT
PLL
IN
txDAT
P
txDAT
N
txCLK
rxSYNC
rxLOOP
2
rxGAIN
Delta-Sigma
Modulator
14
rxD13 - rxD0
Decimation
Filter
Receive
Control
Transmit
Control
Voltage
Reference
REF
P
V
CM
REF
N
rxLINE
P
rxLINE
N
rxHYB
P
rxHYB
N
Patents Pending
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NOTES: (1) With a balanced differential signal, the positive input is 180° out of phase with the negative input, therefore the actual voltage swing about the common
mode voltage on each pin is
±1.5V
to achieve a differential input range of
±3.0V
or 6Vp-p. (2) FSR is Full-Scale Range. (3) The output data is available at twice the
symbol rate with interpolated values. (4) With a pseudo-random equiprobable sequence of HDSL pulses; 13.5dBm applied to the transformer (27dBm output from
txLINE
P
and txLINE
N
). (5) See the Discussion of Specifications section of this data sheet for more information. (6) Guaranteed by design and characterization. (7)
Uncancelled Echo is a measure of the total analog errors in the transmitter and receiver sections including the effect of non-linearity and noise. See the Discussion
of Specifications section of this data sheet for more information. (8) Power dissipation includes only the power dissipated within the component and does not include
power dissipated in the external loads. See the Discussion of Specifications section for more information.
®
AFE1103
2
PIN DESCRIPTIONS
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
TYPE
Ground
Power
Input
Input
Input
Output
Output
Output
Output
Output
Output
Ground
Power
Output
Output
Output
Output
Output
Output
Output
Output
Ground
Input
Input
Input
Input
Power
Input
Input
Input
Input
Ground
Ground
Output
Output
Output
Power
Ground
Output
Power
Output
Ground
NC
NC
NC
NC
Output
Input
NAME
PGND
PV
DD
txCLK
txDAT
N
txDAT
P
rxD0
rxD1
rxD2
rxD3
rxD4
rxD5
DGND
DV
DD
rxD6
rxD7
rxD8
rxD9
rxD10
rxD11
rxD12
rxD13
DGND
rxSYNC
rxGAIN0
rxGAIN1
rxLOOP
AV
DD
rxHYB
N
rxHYB
P
rxLINE
N
rxLINE
P
AGND
AGND
REF
P
V
CM
REF
N
AV
DD
AGND
txLINE
N
AV
DD
txLINE
P
AGND
NC
NC
NC
NC
PLL
OUT
PLL
IN
DESCRIPTION
Analog Ground for PLL
Analog Supply (+5V) for PLL
Symbol Clock (QCLK from Bt8952) (392kHz for T1, 584kHz for E1)
XMITB Line from Bt8952
XMIT Line from Bt8952
ADC Output Bit-0 (RCV 2 from Bt8952)
ADC Output Bit-1 (RCV 3 from Bt8952)
ADC Output Bit-2 (RCV 4 from Bt8952)
ADC Output Bit-3 (RCV 5 from Bt8952)
ADC Output Bit-4 (RCV 6 from Bt8952)
ADC Output Bit-5 (RCV 7 from Bt8952)
Digital Ground
Digital Supply (+3.3V to +5V)
ADC Output Bit-6 (RCV 8 from Bt8952)
ADC Output Bit-7 (RCV 9 from Bt8952)
ADC Output Bit-8 (RCV 10 from Bt8952)
ADC Output Bit-9 (RCV 11 from Bt8952)
ADC Output Bit-10 (RCV 12 from Bt8952)
ADC Output Bit-11 (RCV 13 from Bt8952)
ADC Output Bit-12 (RCV 14 from Bt8952)
ADC Output Bit-13 (RCV 15 from Bt8952)
Digital Ground
ADC Sync Signal (RCVCLK from Bt8952) (392kHz for T1, 584kHz for E1)
Receive Gain Control Bit-0
Receive Gain Control Bit-1
Loopback Control Signal (loopback is enabled by positive signal)
Analog Supply (+5V)
Negative Input from Hybrid Network
Positive Input from Hybrid Network
Negative Line Input
Positive Line Input
Analog Ground
Analog Ground
Positive Reference Output, Nominally 3.5V
Common-Mode Voltage (buffered), Nominally 2.5V
Negative Reference Output, Nominally 1.5V
Analog Supply (+5V)
Analog Ground
Transmit Line Output Negative
Analog Supply (+5V)
Transmit Line Output Positive
Analog Ground
Connection to Ground Recommended
Connection to Ground Recommended
Connection to Ground Recommended
Connection to Ground Recommended
PLL Filter Output
PLL Filter Input
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
3
AFE1103
PIN CONFIGURATION
Top View
SSOP
ABSOLUTE MAXIMUM RATINGS
Analog Inputs: Current ..............................................
±100mA,
Momentary
±10mA,
Continuous
Voltage .................................. AGND –0.3V to AV
DD
+0.3V
Analog Outputs Short Circuit to Ground (+25°C) ..................... Continuous
AV
DD
to AGND ........................................................................ –0.3V to 6V
PV
DD
to PGND ........................................................................ –0.3V to 6V
DV
DD
to DGND ........................................................................ –0.3V to 6V
PLL
IN
or PLL
OUT
to PGND ......................................... –0.3V to PV
DD
+0.3V
Digital Input Voltage to DGND .................................. –0.3V to DV
DD
+0.3V
Digital Output Voltage to DGND ............................... –0.3V to DV
DD
+0.3V
AGND, DGND, PGND Differential Voltage ......................................... 0.3V
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