Burr-Brown’s Analog Front End greatly reduces the size and
cost of a single pair HDSL (High bit rate Digital Subscriber
Line) system by providing all of the active analog circuitry
needed to connect an HDSL digital signal processor to an
external compromise hybrid and an HDSL line transformer.
The transmit and receive filter responses automatically change
with clock frequency, allowing the AFE1203 to operate over a
wide range of data rates. The power dissipation of the device
can be reduced under digital control for operation at lower
speeds. The AFE1203 will operate at bit rates from 160kbps to
2.3Mbps. It meets ETSI PSD specifications for single pair E1,
as well as ETSI and ANSI PSD specifications for two pair E1
and T1.
Functionally, this unit consists of a transmit and a receive
section. The transmit section generates, filters, and buffers
outgoing 2B1Q data. The receive section filters and digitizes
the symbol data received on the telephone line. This IC operates
on a single 5V supply. The digital circuitry in the unit can be
connected to a supply from 3.3V to 5V. The chip uses only
385mW for full-speed operation. It is housed in a small 48-lead
SSOP package.
The receive channel is designed around a fourth-order delta-
sigma analog-to-digital converter. It includes a difference am-
plifier designed to be used with an external compromise hybrid
for first-order analog echo cancellation. A programmable gain
amplifier with gains 0dB to +9dB is also included. The delta-
sigma modulator, operating at a 24X oversampling ratio, pro-
duces a 14-bit output at symbol rates up to 1168kHz (for
2.3Mbps operation).
The transmit channel consists of a digital-to-analog converter and
switched-capacitor pulse forming network followed by a differ-
ential line driver. The pulse forming network receives symbol
data and generates a standard 2B1Q output waveform. The
differential line driver uses a composite output stage combining
class B operation (for high efficiency driving large signals) with
class AB operation (to minimize crossover distortion).
txLINE
P
txLINE
N
D/A
Converter
Pulse
Former
Line
Driver
PLL
OUT
PLL
IN
txDAT
txCLK
rxSYNC
rxLOOP
2
rxGAIN
Delta-Sigma
Modulator
14
rxD13 - rxD0
Decimation
Filter
Receive
Control
Transmit
Control
Voltage
Reference
REF
P
V
CM
REF
N
rxLINE
P
rxLINE
N
rxHYB
P
rxHYB
N
Patents Pending
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
= 1168kHz (E1 single pair rate) and Normal Power mode, unless otherwise specified.
AFE1203E
PARAMETER
RECEIVE CHANNEL
Number of Inputs
Input Voltage Range
Common-Mode Voltage
Input Impedance
Input Capacitance
Input Gain Matching
Resolution
Programmable Gain
Settling Time
Gain + Offset Error
Output Data Coding
Data Rate
COMMENTS
Differential
Balanced Differential
(1)
1.5V CMV Recommended
All Inputs
Line Input vs Hybrid Input
Four Gains: 0dB, 3.25dB, 6dB, and 9dB
Gain, rxSYNC, or Power Mode Change
(8)
Tested at Each Gain Range
Normal Power
Medium Power
Low Power
Normal Power, rxSYNC
(3)
Symbol Rate, Normal Power
Symbol Rate, Medium Power
Symbol Rate, Low Power
2320kbps
1168kbps
784kbps
MIN
2
±3.0
+1.5
See Typical Performance Curves
10
±2
14
6
5
Binary Two’s Complement
384
2320
192
1168
160
320
196
1168
196
96
80
1168
584
160
V
V
pF
%
Bits
Symbol
Periods
%FSR
(2)
kbps
kbps
kbps
kHz
kHz
kHz
kHz
kHz
kHz
kHz
dBm
V
Ω
dB
dB
dB
dB
dB
TYP
MAX
UNITS
Output Word Rate
TRANSMIT CHANNEL
Transmit Clock Rate, f
TX
Transmit –3dB Point
Transmit Power
(4)
Pulse Output
Common-Mode Voltage, V
CM
Output Resistance
(5)
TRANSCEIVER PERFORMANCE
Uncancelled Echo
(6)
DC to 1MHz
rxGAIN = 0dB, Loopback Enabled
rxGAIN = 0dB, Loopback Disabled
rxGAIN = 3.25dB, Loopback Disabled
rxGAIN = 6dB, Loopback Disabled
rxGAIN = 9dB, Loopback Disabled
485
292
196
13
13.5
14
See Typical Performance Curves
AV
DD
/2
1
–67
–67
–69
–71
–73
DIGITAL INTERFACE
(5)
Logic Levels
V
IH
V
IL
V
OH
V
OL
POWER
Analog Power Supply Voltage
Digital Power Supply Voltage
Power
Dissipation
(4, 7)
|I
IH
| < 10µA
|I
IL
| < 10µA
I
OH
= –20µA
I
OL
= 20µA
Specification
Operating Range
Specification
Operating Range
Normal Power
Medium Power
Low Power
Normal Power, DV
DD
= 5V
DV
DD
– 1
–0.3
DV
DD
– 0.5
DV
DD
+ 0.3
+0.8
+0.4
5
V
V
V
V
V
V
V
V
mW
mW
mW
mW
dB
°C
4.75
3.3
3.15
385
300
240
415
55
–40
5.25
5.25
Power Dissipation
(7)
PSRR
TEMPERATURE RANGE
Operating
(5)
+85
NOTES: (1) With a balanced differential signal, the positive input is 180° out of phase with the negative input, therefore the actual voltage swing about the common
mode voltage on each pin is
±1.5V
to achieve a differential input range of
±3.0V
or 6Vp-p. (2) FSR is Full-Scale Range. (3) The output data is available at twice the
symbol rate with interpolated values. (4) With a pseudo-random equiprobable sequence of HDSL pulses; 13.5dBm applied to the transformer (27dBm output from
txLINE
P
and txLINE
N
). (5) Guaranteed by design and characterization. (6) Uncancelled Echo is a measure of the total analog errors in the transmitter and receiver
sections including the effect of non-linearity and noise. See the Discussion of Specifications section of this data sheet for more information. (7) Power dissipation
includes only the power dissipated within the component and does not include power dissipated in the external loads. The AFE1203 is tested with a 1:2 line
transformer. (8) This is the settling time required for any gain change, change of rxSYNC or any change of power mode.
®
AFE1203
2
PIN DESCRIPTIONS
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
TYPE
Ground
Power
Input
Input
Input
Output
Output
Output
Output
Output
Output
Ground
Power
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Power
Input
Input
Input
Input
Ground
Ground
Output
Output
Output
Power
Ground
Output
Power
Output
Ground
NC
NC
NC
NC
Output
Input
NAME
AGND
AV
DD
txCLK
txDAT
N
txDAT
P
rxD0
rxD1
rxD2
rxD3
rxD4
rxD5
DGND
DV
DD
rxD6
rxD7
rxD8
rxD9
rxD10
rxD11
rxD12
rxD13
PWSEL
rxSYNC
rxGAIN0
rxGAIN1
rxLOOP
AV
DD
rxHYB
N
rxHYB
P
rxLINE
N
rxLINE
P
AGND
AGND
REF
P
V
CM
REF
N
AV
DD
AGND
txLINE
N
AV
DD
txLINE
P
AGND
NC
NC
NC
NC
PLL
OUT
PLL
IN
DESCRIPTION
Analog Ground for PLL
Analog Supply (+5V) for PLL
Symbol Clock
XMITB Line
XMIT Line
ADC Output Bit-0
ADC Output Bit-1
ADC Output Bit-2
ADC Output Bit-3
ADC Output Bit-4
ADC Output Bit-5
Digital Ground
Digital Supply (+3.3V to +5V)
ADC Output Bit-6
ADC Output Bit-7
ADC Output Bit-8
ADC Output Bit-9
ADC Output Bit-10
ADC Output Bit-11
ADC Output Bit-12
ADC Output Bit-13
Power Control
ADC Sync Signal
Receive Gain Control Bit-0
Receive Gain Control Bit-1
Loopback Control Signal (loopback is enabled by positive signal)
Analog Supply (+5V)
Negative Input from Hybrid Network
Positive Input from Hybrid Network
Negative Line Input
Positive Line Input
Analog Ground
Analog Ground
Positive Reference Output, Nominally 3.5V
Common-Mode Voltage (buffered), Nominally 2.5V
Negative Reference Output, Nominally 1.5V
Analog Supply (+5V)
Analog Ground
Transmit Line Output Negative
Analog Supply (+5V)
Transmit Line Output Positive
Analog Ground
Connection to Ground Recommended
Connection to Ground Recommended
Connection to Ground Recommended
Connection to Ground Recommended
PLL Filter Output
PLL Filter Input
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
3
AFE1203
ABSOLUTE MAXIMUM RATINGS
Analog Inputs: Current ..............................................
±100mA,
Momentary
±10mA,
Continuous
Voltage .................................. AGND –0.3V to AV
DD
+ 0.3V
Analog Outputs Short Circuit to Ground (+25°C) ..................... Continuous
AV
DD
to AGND ......................................................................... –0.3V to 6V
DV
DD
to DGND ......................................................................... –0.3V to 6V
PLL
IN
or PLL
OUT
to AGND ........................................ –0.3V to AV
DD
+ 0.3V
Digital Input Voltage to DGND ................................. –0.3V to DV
DD
+ 0.3V
Digital Output Voltage to DGND .............................. –0.3V to DV
DD
+ 0.3V
AGND, DGND Differential Voltage ..................................................... 0.3V
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