K3P6V1000B-TC150 datasheet, PDF

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K3P6V1000B-TC150: DescriptionMASK ROM, 2MX16, 150ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44; Categorystorage storage; File Size62KB，4 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/

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K3P6V1000B-TC150 Overview

MASK ROM, 2MX16, 150ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

K3P6V1000B-TC150 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	SAMSUNG
Parts packaging code	TSOP2
package instruction	TSOP2,
Contacts	44
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	150 ns
Spare memory width	8
JESD-30 code	R-PDSO-G44
length	18.41 mm
memory density	33554432 bit
Memory IC Type	MASK ROM
memory width	16
Number of functions	1
Number of terminals	44
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2MX16
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	10.16 mm

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K3P6V1000B-TC

32M-Bit (4Mx8 /2Mx16) CMOS MASK ROM

FEATURES

•

Switchable organization

4,194,304 x 8(byte mode)

2,097,152 x 16(word mode)

•

Fast access time

Random Access Time : 100ns(Max.)

Page Access Time

: 30ns(Max.)

•

8 words/ 16 bytes page access

•

Supply voltage : single +3.3V

•

Current consumption

Operating : 60mA(Max.)

Standby : 30µA(Max.)

•

Fully static operation

•

All inputs and outputs TTL compatible

•

Three state outputs

•

Package

-. K3P6V1000B-TC : 44-TSOP2-400

CMOS MASK ROM

GENERAL DESCRIPTION

The K3P6V1000B-TC is a fully static mask programmable ROM

fabricated using silicon gate CMOS process technology, and is

organized either as 4,194,304x8 bit(byte mode) or as

2,097,152x16 bit(word mode) depending on BHE voltage

level.(See mode selection table)

This device includes page read mode function, page read mode

allows 8 words(or 16 bytes) of data to read fast in the same

page, CE and A

~ A

should not be changed.

This device operates with a 3.3V power supply, and all inputs

and outputs are TTL compatible.

Because of its asynchronous operation, it requires no external

clock assuring extremely easy operation.

It is suitable for use in program memory of microprocessor, and

data memory, character generator.

The K3P6V1000B-TC is packaged in a 44-TSOP2.

FUNCTIONAL BLOCK DIAGRAM

-1

BUFFERS

AND

DECODER

MEMORY CELL

MATRIX

(2,097,152x16/

4,194,304x8)

PIN CONFIGURATION

N.C

44 A

43 A

42 A

41 A

40 A

39 A

38 A

37 A

36 A

35 A

BUFFERS

AND

DECODER

SENSE AMP.

DATA OUT

BUFFERS

. . .

TSOP2

34 A

33 BHE

32 V

31 Q

-1

30 Q

29 Q

28 Q

27 Q

26 Q

25 Q

24 Q

23 V

CE 12

OE 14

BHE

CONTROL

LOGIC

Pin Name

- A

- Q

-1

BHE

N.C

Pin Function

Page Address Inputs

Address Inputs

Data Outputs

Output 15(Word mode)/

LSB Address(Byte mode)

Word/Byte selection

Chip Enable

Output Enable

Power (3.3V)

Ground

No Connection

K3P6V1000B-TC

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