X9421
NOT RECOMMENDED FOR NEW DESIGNS
POSSIBLE SUBSTITUTE PRODUCT
ISL22416, ISL22419
DATASHEET
FN8196
Rev.1.00
January 14, 2009
Low Noise/Low Power/SPI Bus Single Digitally Controlled (XDCP™)
Potentiometer
Description
The X9421 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS integrated
circuit.
The digital controlled potentiometer is implemented using 63
resistive elements in a series array. Between each element
are tap points connected to the wiper terminal through
switches. The position of the wiper on the array is controlled
by the user through the SPI bus interface. The potentiometer
has associated with it a volatile Wiper Counter Register
(WCR) and a four non-volatile Data Registers that can be
directly written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor array
though the switches. Power-up recalls the contents of the
default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
• Single Voltage Potentiometer
• 64 Resistor Taps
• SPI Serial Interface for Write, Read, and Transfer
Operations of the Potentiometer
• Wiper Resistance, 150 Typical at 5V
• 4 Non-Volatile Data Registers
• Non-Volatile Storage of Multiple Wiper Positions
• Power-on Recall. Loads Saved Wiper Position on
Power-up.
• Standby Current < 5µA Max
• V
CC
: 2.7V to 5.5V Operation
• 2.5k, 10k End to End Resistance
• 100 yr. Data Retention
• Endurance: 100, 000 Data Changes per Bit per Register
• 14 Ld TSSOP, 16 Ld SOIC
• Low Power CMOS
• Pb-Free Available (RoHS Compliant)
Block Diagram
V
CC
R
H
/V
H
ADDRESS
DATA
STATUS
SPI
BUS
INTERFACE
WRITE
READ
TRANSFER
INC / DEC
BUS
INTERFACE &
CONTROL
CONTROL
POWER-ON RECALL
WIPER COUNTER
REGISTER (WCR)
DATA REGISTERS
4 BYTES
WIPER
POT
10k
64-TAPS
V
SS
R
W
/V
W
R
L
/V
L
FN8196 Rev.1.00
January 14, 2009
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Page 1 of 20
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2008, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9421
Ordering Information
PART
NUMBER
X9421YS16*
X9421YS16Z* (Note)
X9421YS16I*
X9421YS16IZ* (Note)
X9421YV14*
X9421YV14Z* (Note)
X9421YV14I*
X9421YV14IZ* (Note)
X9421WS16*
X9421WS16Z* (Note)
X9421WS16I*
X9421WS16IZ* (Note)
X9421WV14*
X9421WV14Z* (Note)
X9421WV14I*
X9421WV14IZ* (Note)
X9421YS16-2.7*
X9421YS16Z-2.7* (Note)
X9421YS16I-2.7*
X9421YS16IZ-2.7* (Note)
X9421YV14-2.7*
X9421YV14Z-2.7* (Pb-free)
X9421YV14I-2.7*
X9421YV14IZ-2.7* (Pb-free)
X9421WS16-2.7*
X9421WS16Z-2.7* (Note)
X9421WS16I-2.7*
X9421WS16IZ-2.7* (Note)
X9421WV14-2.7*
X9421WV14Z-2.7* (Pb-free)
X9421WV14I-2.7*
PART
MARKING
X9421YS
X9421YS Z
X9421YS I
X9421YS ZI
X9421 YV
X9421 YVZ
X9421 YV I
X9421 YVZI
X9421WS
X9421WS Z
X9421WS I
X9421WS ZI
X9421 WV
X9421 WV Z
X9421 WV I
X9421 WVZI
X9421YS F
X9421YS ZF
X9421 YS G
X9421 YS ZG
X9421 YVF
X9421 YVZF
X9421 YVG
X9421 YVZG
X9421WS F
X9421WS ZF
X9421WS G
X9421WS ZG
X9421 WVF
X9421 WVZF
X9421 WVG
10
2.7 to 5.5
2.5
10
V
CC
LIMITS
(V)
5 ±10%
POTENTIOMETER
ORGANIZATION
(k)
2.5
TEMP
RANGE (°C)
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
PACKAGE
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
16 Ld SOIC (300 mil)
16 Ld SOIC (300 mil) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-Free)
X9421WV14IZ-2.7* (Pb-free) X9421 WVZG
*Add "T1" suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020
FN8196 Rev.1.00
January 14, 2009
Page 2 of 20
X9421
Detailed Functional Diagrams
V
CC
DR0 DR1
HOLD
CS
SCK
SO
SI
A0
WP
CONTROL
INTERFACE
AND
CONTROL
CIRCUITRY
D ATA
POWER-ON RECALL
WIPER
10k
64-taps
R
H
/V
H
COUNTER
REGISTER
(WCR)
DR2 DR3
R
L
/V
L
R
W
/V
W
V
SS
Circuit Level Applications
• Vary the Gain of a Voltage Amplifier
• Provide Programmable DC Reference Voltages for
Comparators and Detectors
• Control the Volume in Audio Circuits
• Trim Out the Offset Voltage Error in a Voltage Amplifier
Circuit
• Set the Output Voltage of a Voltage Regulator
• Trim the Resistance in Wheatstone Bridge Circuits
• Control the Gain, Characteristic Frequency and
Q-factor in Filter Circuits
• Set the Scale Factor and Zero Point in Sensor Signal
Conditioning Circuits
• Vary the Frequency and Duty Cycle of Timer ICs
• Vary the DC Biasing of a Pin Diode Attenuator in RF Circuits
• Provide a Control Variable (I, V, or R) in Feedback Circuits
System Level Applications
• Adjust the contrast in LCD displays
• Control the Power Level of LED Transmitters in
Communication Systems
• Set and Regulate the DC Biasing Point in an RF Power
Amplifier in Wireless Systems
• Control the Gain in Audio and Home Entertainment Systems
• Provide the Variable DC Bias for Tuners in RF Wireless
Systems
• Set the Operating Points in Temperature Control Systems
• Control the Operating Point for Sensors in Industrial
Systems
• Trim Offset and Gain Errors in Artificial Intelligent Systems
FN8196 Rev.1.00
January 14, 2009
Page 3 of 20
X9421
X9421
(14 LD TSSOP)
TOP VIEW
S0
NC
NC
CS
SCK
SI
VSS
1
2
3
4
5
6
7
14 VCC
13 R
L
/V
L
12 R
H
/V
H
11 R
W
/V
W
10 HOLD
9
8
A0
WP
NC 1
SO 2
NC 3
CS 4
SCK 5
SI 6
NC 7
VSS 8
X9421
(16 LD SOIC)
TOP VIEW
16 VCC
15 NC
14 R
L
/V
L
13 R
H
/V
H
12 R
W
/V
W
11 ISEN
10 AO
9 WP
Pin Assignments
TSSOP
PIN NO.
1
2, 3
4
5
6
7
8
9
10
11
12
13
14
12
13
14
16
SOIC
PIN NO.
2
3, 1, 7, 5
4
5
6
8
9
10
SYMBOL
SO
NC
CS
SCK
SI
VSS
WP
A0
HOLD
R
W
/V
W
R
H
/V
H
R
L
/V
L
VCC
Serial Data Output
No Connect
Chip Select
Serial Clock
Serial Data Input
System Ground
Hardware Write Protect
Device Address
Device select. Pause the serial bus.
Wiper Terminal of the Potentiometer.
High Terminal of the Potentiometer.
Low Terminal of the Potentiometer.
System Supply Voltage
DESCRIPTION
Pin Descriptions
Host Interface Pins
SERIAL OUTPUT (SO)
SO is a push/pull serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by the falling
edge of the serial clock.
SERIAL INPUT
SI is the serial data input pin. All opcodes, byte addresses and
data to be written to the potentiometer and pot register are
input on this pin. Data is latched by the rising edge of the serial
clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the X9421.
CHIP SELECT (CS)
When CS is HIGH, the X9421 is deselected and the SO pin is
at high impedance, and (unless an internal write cycle is
underway) the device will be in the standby state. CS LOW
enables the X9421, placing it in the active power mode. It
should be noted that after a power-up, a HIGH to LOW
transition on CS is required prior to the start of any operation.
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence is
underway, HOLD may be used to pause the serial
communication with the controller without resetting the serial
sequence. To pause, HOLD must be brought LOW while SCK
is LOW. To resume communication, HOLD is brought HIGH,
again while SCK is LOW. If the pause feature is not used,
HOLD should be held HIGH at all times.
DEVICE ADDRESS (A
0
)
The address input is used to set the least significant bit of the
8-bit slave address. A match in the slave address serial data
stream must be made with the address input in order to initiate
FN8196 Rev.1.00
January 14, 2009
Page 4 of 20
X9421
communication with the X9421. A maximum of two devices
may occupy the SPI serial bus.
ways: it may be written directly by the host via the Write Wiper
Counter Register instruction (serial load); it may be written
indirectly by transferring the contents of one of four associated
Data Registers via the XFR Data Register instruction (parallel
load); it can be modified one step at a time by the
Increment/Decrement instruction. Finally, it is loaded with the
contents of its data register zero (DR0) upon power-up.
The Wiper Counter Register is a volatile register; that is, its
contents are lost when the X9421 is powered-down. Although
the register is automatically loaded with the value in DR0 upon
power-up, this may be different from the value present at
power-down.
Potentiometer Pins
V
H
/R
H
, V
L
/R
L
The V
H
/R
H
and V
L
/R
L
inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
V
W
/R
W
The wiper output is equivalent to the wiper output of a
mechanical potentiometer.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents nonvolatile writes to the Data
Registers. Writing to the Wiper Counter Register is not
restricted.
SYSTEM/DIGITAL SUPPLY (V
CC
)
VCC is the supply voltage for the system/digital section. VSS is
the system ground.
Data Registers
The potentiometer has four 6-bit nonvolatile Data Registers.
These can be read or written directly by the host. Data can also
be transferred between any of the four Data Registers and the
WCR. It should be noted all operations changing data in one of
the Data Registers is a nonvolatile operation and will take a
maximum of 10ms.
If the application does not require storage of multiple settings
for the potentiometer, the Data Registers can be used as
regular memory locations for system parameters or user
preference data.
Principles of Operation
The X9421 is a highly integrated microcircuit incorporating a
resistor array and associated registers and counter and the
serial interface logic providing direct communication between
the host and the XDCP potentiometer.
Serial Interface
The X9421 supports the SPI interface hardware conventions.
The device is accessed via the SI input with data clocked in on
the rising SCK. CS must be LOW and the HOLD and WP pins
must be HIGH during the entire operation.
The SO and SI pins can be connected together, since they
have three state outputs. This can help to reduce system pin
count.
Register Descriptions
TABLE 1. DATA REGISTERS, (6-BIT), NONVOLATILE
0
(MSB)
0
D5
D4
D3
D2
D1
D0
(LSB)
There are four 6-bit Data Registers associated with the
potentiometer.
• {D5~D0}: These bits are for general purpose Nonvolatile
data storage or for storage of up to four different wiper
values.
TABLE 2. WIPER COUNTER REGISTER, (6-BIT), VOLATILE
0
(MSB)
0
WP5
WP4
WP3
WP2
WP1
WP0
Array Description
The X9421 is comprised of one resistor array containing 63
discrete resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (V
H
/R
H
and V
L
/R
L
inputs).
At both ends of the array and between each resistor segment
is a CMOS switch connected to the wiper (V
W
/R
W
) output.
Within the individual array only one switch may be turned on at
a time.
These switches are controlled by a Wiper Counter Register
(WCR). The six bits of the WCR are decoded to select, and
enable, one of sixty-four switches. The block diagram of the
potentiometer is shown in Figure 1.
(LSB)
• {WP5~WP0}: These bits specify the wiper position of the
potentiometer.
Wiper Counter Register (WCR)
The X9421 contains a Wiper Counter Register. The WCR can
be envisioned as a 6-bit parallel and serial load counter with its
outputs decoded to select one of sixty-four switches along its
resistor array. The contents of the WCR can be altered in four
FN8196 Rev.1.00
January 14, 2009
Page 5 of 20
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