BLDC Motor Pre-driver with
Speed Control, Single-phase,
12 V, 24 V and 48 V
LV8310H
Overview
The LV8310HGR2G is a pre-driver for a 12 V, 24 V and 48 V single
phase BLDC motor, which controls motor rotational speed with the
built-in closed loop speed controller. Its target speed can be set by
input PWM duty cycle. The speed curve setting can be stored to the
internal nonvolatile memory (NVM). In addition, Lead-angle can also
be adjusted by the configuration saved in the internal NVM. Thus, it
can drive various kinds of motors at high efficiency and low noise.
Features
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1
TSSOP−16
CASE 948F
•
Driver Output for External Power FETs
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
(P-MOS High Side, N-MOS Low Side)
Selectable High Side Gate Driver Polarity: One for 12 V Motor
Voltage and the other for 24 V/48 V Motor Voltage with External
Level Shifter FET
PI Closed Loop Speed Control Function
Single-phase Full Wave Driver
PWM Duty Cycle Input (25 Hz to 100 kHz)
Soft Start-up Function
PWM Soft Switching Phase Transitions
Soft PWM Duty Cycle Transitions (Changing the Target Speed
Gradually)
Built-in Current Limit Function and Over Current Protection
Function
Built-in Thermal Protection Function
Built-in Locked Rotor Protection and Automatic Recovery Function
FG or RD Signal Output Selectable
Dynamic Lead Angle Adjustment with Respect to Input Duty Cycle
Parameter Setting by Serial Communication
Embedded EEPROM as NVM
Parameter Setting to the NVM
Pb-Free and Halogen Free
Telecom Server and Base Station Cooling Fan
Desktop PC Cooling Fan
Server Cooling Fan
Refrigerator Circulation Fan
Appliance Cooling Fan
Power Supply Unit Cooling Fan
MARKING DIAGRAM
16
LV83
10H
ALYWG
G
1
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 34 of
this data sheet.
Typical Applications
©
Semiconductor Components Industries, LLC, 2017
December, 2019
−
Rev. 1
1
Publication Order Number:
LV8310H/D
LV8310H
Application Diagram
Figure 1 shows 12 V application diagram of the chip and
Figure 2 shows the higher voltage (24 V/48 V) application
diagram of the chip. For 12 V application, the REG and
VM
R9
C4
VDD pins must be hard wired to each other in the shortest
path and the TYPE pin must be grounded. For the higher
voltage application, the REG, VDD and TYPE pins must be
hard wired to each other in the shortest path.
C6
M1
M3
R10
R3
OUT1
R4
R11
M2
C5
M
M4
C7
OUT2
R5
R6
R12
DZ1
R7
R8
C3
D2
Power
Supply
(12V)
O1L
1
16
O2H
O1H
2
15
O2L
TYPE
3
D1
VCC
4
C1
PGND
SGND
REG
5
C2
R1
VDD
6
11
12
LV8310H
13
14
GPCDIS
R13
RF
GND
TSL
PWM−IN
T1
Hall
C8
IN1
7
10
PWM
Pull−up
R2
IN2
8
9
FG
FG−OUT
(RD−OUT)
Figure 1. Example of Application Diagram for 12 V
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LV8310H
VM
R9
C4
M1
R3
C3
D1
OUT1
R4
R14
C5
M2
M
M4
C7
OUT2
R6
R15
M3
R5
C6
R10
R7
R8
Power
S upply
(24V/48V)
MN1
R13
QN1
R11
O1L
1
O1H
2
TYPE
DZ2
R16
C1
VCC
4
13
LV8310H
5
C2
R1
VDD
6
11
12
3
14
15
16
O2H
MN2
R12
O2L
GPCDIS
RF
PGND
SGND
REG
GND
TSL
PWM−IN
T1
Hall
C8
IN1
7
10
PWM
Pull−up
R2
FG−OUT
(RD−OUT)
IN2
8
9
FG
Figure 2. Example of Application Diagram for 24 V/48 V
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LV8310H
External Components
Table 1 shows the external component list for 12 V
application and Table 2 shows the external component list
for higher voltage application.
Please refer to Table 9 “Pin Description” as well.
Table 1. EXAMPLE OF EXTERNAL COMPONENT VALUE FOR 12 V APPLICATION
(Figure 1)
Device
M1, M3
M2, M4
D1
D2
DZ1
C1
C2
C3
C4−C7
C8
R1
R2
R3−R6
R7, R8
R9, R10
Qty
1
1
1
1
1
1
1
1
4
1
1
1
4
2
2
Description
Power MOS FET (Pch)
Power MOS FET (Nch)
Anti-reverse connection
diode
Anti-reverse connection
diode
12 V Zener diode
VCC bypass capacitor
REG bypass capacitor
FET power bypass capacitor
LPF resistor for FET gate
Filter of system noise
Current limiter resistor for
Hall
FG pull-up resistor
LPF capacitor for FET gate
Current sense resistor
O1H/O2H pull-up resistor is
required when Gate Polarity
Check is enabled
(GPCDIS pin = low) and
TYPE pin = low
Adjust the delay of FET drive
Short SGND to PGND
Hall element
Value
−
−
−
−
12 V
10
mF
50 V
1
mF
25 V
10
mF
50 V
*
0.1
mF
50 V
2 kW 1/4 W
10 kW 1/4 W
100
W
1/8 W
100 mW 1 W
100 kW 1/8 W
Tol
−
−
−
−
−
10%
10%
10%
−
10%
5%
5%
5%
5%
5%
Footprint
SOIC8
SOIC8
Manufacture
ON Semiconductor
ON Semiconductor
Manufacture
Part Number
FW4604
FW4604
R11, R12
R13
T1
2
1
1
*
0
W
1/8 W
5%
*Depend on the user environment. If FW4604 is selected as a M1, M2, M3 and M4, these components are not needed.
Table 2. EXAMPLE OF EXTERNAL COMPONENT VALUE FOR HIGHER VOLTAGE APPLICATION
(Figure 2)
Device
M1, M3
M2, M4
QN1
MN1,
MN2
D1
DZ2
C1
C2
C3
Qty
1
1
1
2
1
1
1
1
1
Description
Power MOS FET (Pch)
Power MOS FET (Nch)
VCC voltage supply circuit
NPN−Tr
Nch-FET for high side drive
Anti-reverse connection
diode
12 V Zener diode
VCC bypass capacitor
REG bypass capacitor
FET power bypass capacitor
Value
−
−
−
−
−
12 V
1
mF
50 V
1
mF
25 V
10
mF
50 V
Tol
−
−
−
−
−
−
10%
10%
10%
Footprint
SOIC8
SOIC8
Manufacture
ON Semiconductor
ON Semiconductor
Manufacture
Part Number
FW389
FW389
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LV8310H
Table 2. EXAMPLE OF EXTERNAL COMPONENT VALUE FOR HIGHER VOLTAGE APPLICATION
(Figure 2) (continued)
Device
C4−C7
C8
R1
R2
R3−R6
R7, R8
R9, R10
Qty
4
1
1
1
4
2
2
Description
LPF resistor for FET gate
Filter of system noise
Current limiter resistor for
Hall
FG pull-up resistor
LPF capacitor for FET gate
Current sense resistor
Pch gate pull-up resistor is
required when Gate Polarity
Check is enabled
(GPCDIS pin = low) and
TYPE pin = high
O1H/O2H pull-down resistor
VCC voltage supply circuit re-
sistor
Adjust the delay of FET drive
Short SGND to PGND
Hall element
0
W
1/8 W
−
5%
−
Value
1000 pF 50 V
0.1
mF
50 V
2 kW 1/4 W
10 kW 1/4 W
100
W
1/8 W
100 mW 1 W
1 kW 1/4 W
Tol
10%
10%
5%
5%
5%
5%
5%
Footprint
Manufacture
Manufacture
Part Number
R11, R12
R13
R14, R15
R16
T1
2
1
2
1
1
10 kW 1/8 W
1 kW 1/2 W
5%
5%
VCC and GND (VCC, GND)
Command Input Pin (PWM)
The power supplies of the IC need to be decoupled
properly. The following three capacitors must be connected.
•
between VCC (pin 4) and GND (pin 12) as C1 in the
application diagrams
•
between REG (VDD) and SGND as C2
•
between VM and PGND as C3
The Zener diode (DZ1) in Figure 1 is mandatory to prevent
the IC break down in case the supply voltage exceeds the
absolute maximum ratings due to the flyback voltage.
Hall-Sensor Input Pins (IN1, IN2)
This pin reads the duty cycle of the PWM pulse which
controls rotational speed. The PWM input signal level is
supported from 2.8 V to 5.5 V. Linear voltage control is not
supported. The minimum pulse width is 100 ns.
Current Limiter Resistor for Hall (R1)
Hall output amplitude can be adjusted by R1.
The amplitude is proportional to Hall bias level VH for
particular magnetic flux density. VH is determined by the
following equation
.
VH
+
VREG
Rh
Rh
)
R1
(eq. 1)
Differential output signals of the hall sensor are connected
at IN1 and IN2. It is recommended that the capacitor (C8) is
connected between both pins to filter system noise. The value
of C8 should be selected properly depending on the system
noise. When a Hall IC is used, the output of the Hall IC must
be connected to the IN1 pin and the IN2 pin must be kept in
the middle level of the Hall IC power supply voltage which
should be corresponded to recommended operating range.
Table 3. TRUTH TABLE (LV8310H, 12 V)
IN1
L
IN2
H
*Inner PWM State
On
Off
H
L
On
Off
O1L
H
H
L
H
O1H
H
H
L
H
Where
VREG:
Rh:
REG pin voltage (5 V)
Hall resistance
However, it should be considered with Hall sensor
specification and Hall bias current. The bias current should
be set under 20 mA which is REG pin max current.
O2L
L
H
H
H
O2H
L
H
H
H
FG
Hi−Z
Operation State
Drive mode
Regeneration mode
L
Drive mode
Regeneration mode
*Inner PWM state means the OUTPUT active period decided by inner control logic. Don’t match with PWM−pin input signal.
*Condition: Register “DRVMODE [1:0]” = 01, TYPE = Low
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