• Single Fiber, CWDM Integrated Diplexer Transceiver
• 2x5 SFF pinout
• 2x10 SFF pinout supports I2C digital diagnostics
• Voice/Data FTTx ONT/ONU Applications
• 1244 Mbps Tx, 2488 Mbps Rx Asymmetric Data Rate
• 5 Wavelength Pairs Available
• Burst Mode Transmission
• TX Burst Mode Detection, TX-SD
• Commercial temperature
• 28 dB link budget; 20 km reach
• Compliant to IEC-60825 Class 1 laser diode
• SC/APC or SC/UPC fiber connector
• RoHS compliant
- Digital Transmitter:
A CWDM laser diode is employed for upstream transmission at OC-24 (1244Mbps). The optical transmitter includes a back
facet photodetector to monitor laser power for APC control.
- Digital Receiver:
An APD with TIA is employed for downstream data reception at OC-48 (2488Mbps). A post amplifier is also included for CML
output compatibility.
Lim
.
Amp
.
Rx Data
TIA
Rx
Section
1490 nm APD
Receiver
WDM
1310nm Upstream
1490nm Downstream
LDD
Tx Data
Diplexer
Optical
Block
1310 nm
Laser
Tx
Section
Diplexer Block Diagram
DS-6027 Rev 01
SFx-xx-24T-HP-CxE-xx
Absolute Maximum Ratings
Usage of this transceiver shall adhere to the following absolute maximum ratings. Stresses beyond those in Table 1 may cause permanent damage to
the unit. These are stress ratings only, and functional operation of the unit at these or any other conditions beyond those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect unit reliability.
Table 1 - Absolute Maximum Ratings
Parameter
Ambient Storage Temperature
Operating Temperature*
Operating Humidity Range
ESD Sensitivity (Human Body Model)
Lead Soldering Temperature
Vcc_Rx
Vcc_Tx
Minimum
-40
0
10%
-
-
-0.4
-0.4
Maximum
85
70
90%
1000
260ºC
+4.2
Vcc_Rx + 1
ºC
ºC, C-Temp
non-condensing
V
10 sec
V
V
Unit/Conditions
*Operating temperature minimum is ambient, maximum is module case temperature.
Module Characteristics
Table 2 - Module Characteristics
Parameter
Tx to Rx Crosstalk
Total TX and RX Supply Current
Minimum
-
-
Typical
-
-
Maximum
-47
350
dB
mA
Unit/Conditions
DS-6027 Rev 01
SFx-xx-24T-HP-CxE-xx
Functional Characteristics
The following tables list the performance specifications for the various functional blocks of the integrated optical transceiver module.
Table 3 – Digital Transmitter Specifications
Parameter
Operating Voltage
Data Rate
Average Optical Output Power, Po (BOL)
Average Optical Output Power, Po (BOL)
Output Power at Transmit Off
Extinction Ratio
Transmitter Output Eye
Optical Rise and Fall Time
-
Minimum
3.14
-
1.5
0.5
-
10
Typical
3.30
1244.16
-
-
-
-
G.984.2 Figure 3
250
1271
1291
Center Wavelength
1311
1331
1351
SMSR
Differential Input Voltage, V
in
Common-Mode Input Voltage
1.4
Tx Burst Enable Time
Tx Burst Disable Time
Jitter Generation
TX_DIS Input Low
TX_DIS Input High
TX_SD timing “D”
TX_SD timing “X”
-
-
-
0
2.0
-
-
-
200
GND_Tx +
-
0.1
12.86
12.86
0.2
0.8
Vcc_RX
1000
350
ns
ns
UI
V
V
ns
ns
See figure 3
See figure 3
16 bits data @ 1244Mbps
16 bits data @ 1244Mbps
4 kHz to 10 MHz
30
-
1600
Vcc - (V
in
/2) -
V
DC coupled
dB
mVp-p
TXD+/-. DC-coupled
nm
C-temp
±6.5nm
-
ps
20% to 80%
Maximum
3.46
-
5
5
-40
-
Unit
V
Mbps
dBm
dBm
dBm
dB
PRBS 2
23
-1, NRZ, 50% duty cycle
Notes
Vcc referenced to GND_Tx
DS-6027 Rev 01
SFx-xx-24T-HP-CxE-xx
Refer to Figure 1 which schematically describes the high speed data inputs/outputs of the optical transceiver module.
Diplexer
Module
Tx Data
100
Ω
Differential
Transmission Line
Tx_ENB
100
Ω
TX
For CML
Tx/Rx Data
LDD/Post amp.
0.1
µF
F
Rx Data
100
Ω
Differential
Transmission Line
0.1
µF
F
RX
Figure 1 - Schematic representation of the module high speed inputs/outputs
Table 4 – Digital Receiver Specifications
Parameter
Operating Voltage
Data Rate
Minimum
3.14
-
Typical
3.30
2488.32
1451
1471
Operational Wavelength Range
1491
1511
1531
Received Optical Power, BOL
Received Optical Power, EOL
Data Output Rise and Fall Time
Signal Detect Assertion Level
Signal Detect De-Assertion Level
Signal Detect Hysteresis
Differential Output Voltage
-28.0
-27.0
-
-
-45
0.5
300
-
-
160
-
-
-
-
-8
-8
-
-31
-
6
1200
dBm
dBm
ps
dBm
dBm
dB
mV
CML output, ac coupled (0.1µF)
LVTTL with internal 4.7kΩ pull up
Signal Detect Output HIGH Voltage
2.4
-
-
V
resistor. Asserts HIGH when input
data amplitude is above threshold.
LVTTL. De-asserts LOW when input
Signal Detect Output LOW Voltage
RSSI Range
RSSI Accuracy
-
-28
-3
-
-
-
0.6
-8
+3
V
data amplitude is below threshold .
dBm
dB
2x10 only
2x10 only
PRBS 2
23
-1, 50% duty cycle
PRBS 2
23
-1, 50% duty cycle
20% to 80%
Transition during increasing light
Transition during decreasing light
nm
Maximum
3.46
-
Unit
V
Mbps
Notes
Vcc referenced to GND_RX
DS-6027 Rev 01
SFx-xx-24T-HP-CxE-xx
Table 5 - Microcontroller Specifications
Parameter
Operating Voltage
SDA
a
Minimum
3.14
-
-
30
Typical
3.30
-
-
-
Maximum
3.46
-
-
-
Unit
V
-
-
ms
Notes
SCL
b
Reset hold
c
LVTTL, open collector serial data line from the I
2
C
bus to the on board Microcontroller. 100kbps max.
data rate.
2
LVTTL, open collector serial clock line from the I C
bus to the on board Microcontroller.
LVTTL input, internal 50k
pull-up. Active Low
a
b
c
I
2
C SDA and SCL must be open collector or open drain connections.
Clock stretching, as per paragraph 13.2 of the I
2
C Bus Standard, must be implemented to operate correctly.
Please see Table 6 and the timing diagram in Figure 2 below for the recommended system start-up sequence.
Table 6 – Suggested Start-up Sequence
Step
1
2
3
4
5
until the A2D data is ready, followed by 00 (assuming TXDIS and TXFAIL are inactive).
6
The unit is now ready for normal operation.
Action
Power up the host system, with the RESET pin pulled to ground via a
≤4.7k
Drive the RESET pin LOW.
Ensure power to the unit is on.
Drive the RESET pin HIGH to release the unit to become operational.
Read byte A2.6E several times. There will be a NACK until the processor is booted, followed by a 01 (DATA READY BAR)
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