LDS3985xx
Ultra low drop-low noise BiCMOS 300 mA voltage
regulator for use with very low ESR output capacitor
Features
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Input voltage from 2.5 V to 6 V
Stable with low ESR ceramic capacitors
Ultra low dropout voltage (150 mV typ. at 300
mA load, 0.4 mV typ. at 1 mA load)
Very low quiescent current (85 µA typ. at no
load, 200 µA typ. at 300 mA load; max 1.5 µA
in off mode)
Guaranteed output current up to 300 mA
Wide range of output voltage:
– from 1.25 V to 5.0 V
Fast turn-on time: typ. 240 µs
– [C
O
= 2.2 µF, C
BYP
= 33 nF and I
O
= 1 mA]
Logic-controlled electronic shutdown
Internal current and thermal limit
Output low noise voltage 30 µV
RMS
over 10 Hz
to 100 kHz
SVR of 55 dB at 1 kHz, 50 dB at 10 kHz
Temperature range: - 40 °C to 125 °C
makes it suitable for low power applications and in
battery powered systems. Regulator ground
current increases only slightly in dropout, further
prolonging the battery life. Shutdown logic control
function is available, this means that when the
device is used as local regulator, it is possible to
put a part of the board in standby, decreasing the
total power consumption. Typical applications are
in mobile phone and similar battery powered
wireless systems, portable information
appliances.
DFN6
SOT23-5L
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Description
The LDS3985xx provides up to 300 mA, from 2.5
V to 6 V input voltage. It is stable with ceramic and
high quality tantalum capacitor. The ultra low drop
voltage, low quiescent current and low noise
Table 1.
Device summary
Part numbers
LDS3985XX15
LDS3985XX18
LDS3985XX25
LDS3985XX28
LDS3985XX30
LDS3985XX33
LDS3985XX50
Output voltages
1.5 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
5.0 V
July 2010
Doc ID 11039 Rev 7
1/20
www.st.com
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Contents
LDS3985xx
Contents
1
2
3
4
5
6
7
8
9
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Order codes
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20
Doc ID 11039 Rev 7
Pin configuration
LDS3985xx
2
Figure 2.
Pin configuration
Pin connections (top view for SOT23-5L, top through view for DFN6)
SOT23-5L
DFN6
Table 2.
Pin n° for
SOT23-5L
1
2
3
4
5
-
Pin description
Pin n° for
DFN6
1
5
6
4
3
2
Symbol
V
I
GND
V
INH
BYPASS
V
O
N.C.
Input voltage of the LDO
Common ground
Inhibit input voltage: on mode when V
INH
≥
1.2 V, off mode when V
INH
≤
0.4 V (Do not leave floating, not internally pulled down/up)
Bypass pin: connect an external capacitor (usually 10 nF) to minimize
noise voltage
Output voltage of the LDO
Not connect
Name and function
4/20
Doc ID 11039 Rev 7
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