STD85N3LH5
STP85N3LH5, STU85N3LH5
N-channel 30 V, 0.0042
Ω
, 80 A, DPAK, TO-220, IPAK
STripFET™ V Power MOSFET
Features
Type
STD85N3LH5
STP85N3LH5
STU85N3LH5
■
■
■
■
V
DSS
30 V
R
DS(on)
max.
< 0.005
Ω
I
D
3
1
3
2
1
80 A
DPAK
IPAK
R
DS(on)
* Q
g
industry benchmark
Extremely low on-resistance R
DS(on)
High avalanche ruggedness
Low gate drive power losses
1
3
2
TO-220
Application
Switching applications
Figure 1.
Internal schematic diagram
Description
This product utilizes the 5
th
generation of design
rules of ST’s proprietary STripFET
TM
technology.
The lowest available R
DS(on)
*Q
g
, in the standard
packages, makes this device suitable for the most
demanding DC-DC converter applications, where
high power density is to be achieved.
Table 1.
Device summary
Marking
Package
DPAK
85N3LH5
TO-220
Tube
IPAK
Packaging
Tape and reel
Order codes
STD85N3LH5
STP85N3LH5
STU85N3LH5
July 2010
Doc ID 13833 Rev 7
1/16
www.st.com
16
Contents
STD85N3LH5, STP85N3LH5, STU85N3LH5
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
4
5
6
Test circuit
............................................... 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
Doc ID 13833 Rev 7
STD85N3LH5
Electrical ratings
1
Electrical ratings
Table 2.
Symbol
V
DS
V
DS
V
GS
I
D (1)
I
D
I
DM (2)
P
TOT
E
AS (3)
T
stg
T
j
Absolute maximum ratings
Parameter
Drain-source voltage (V
GS
= 0)
Drain-source voltage (V
GS
= 0) @ T
JMAX
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Derating factor
Single pulse avalanche energy
Storage temperature
Max. operating junction temperature
Value
30
35
± 22
80
55
320
70
0.47
165
-55 to 175
175
Unit
V
V
V
A
A
A
W
W/°C
mJ
°C
°C
1. Limited by wire bonding
2. Pulse width limited by safe operating area
3. Starting Tj = 25°C, I
D
= 40 A, V
DD
= 25 V
Table 3.
Symbol
R
thj-case
R
thj-amb
R
thj-pcb
T
l
Thermal resistance
Value
Parameter
TO-220
Thermal resistance junction-case max
Thermal resistance junction-amb max
Thermal resistance junction-pcb max
Maximum lead temperature for
soldering purpose
62.5
100
275
DPAK
2.14
100
IPAK
°C/W
°C/W
°C/W
°C
Unit
Doc ID 13833 Rev 7
3/16
Electrical characteristics
STD85N3LH5, STP85N3LH5, STU85N3LH5
2
Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified)
Table 4.
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
Static
Parameter
Drain-source breakdown
Voltage
Zero gate voltage drain
current (V
GS
= 0)
Gate body leakage current
(V
DS
= 0)
Gate threshold voltage
Test conditions
I
D
= 250 µA, V
GS
= 0
V
DS
= 30 V
V
DS
= 30 V,Tc = 125 °C
V
GS
= ± 22 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 40 A
SMD version
1
1.8
0.042
Min.
30
1
10
±
100
Typ.
Max.
Unit
V
µA
µA
nA
V
Ω
Ω
Ω
Ω
2.5
0.005
R
DS(on)
Static drain-source on
resistance
V
GS
= 10 V, I
D
= 40 A
V
GS
= 5 V, I
D
= 40 A
SMD version
V
GS
= 5 V, I
D
= 40 A
0.0046 0.0054
0.0052 0.0065
0.0058 0.0071
Table 5.
Symbol
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
Q
gs1
Q
gs2
Dynamic
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Pre V
th
gate-to-source
charge
Post V
th
gate-to-source
charge
Test conditions
Min.
Typ.
1850
380
58
14
6.8
4.7
2.3
4.5
Max.
Unit
pF
pF
pF
nC
nC
nC
nC
nC
V
DS
= 25 V, f=1 MHz,
V
GS
= 0
V
DD
= 15 V, I
D
= 80 A
V
GS
= 5 V
Figure 16
V
DD
= 15 V, I
D
= 80 A
V
GS
= 5 V
Figure 16
f = 1 MHz gate bias
Bias = 0 test signal
level = 20 mV
open drain
R
G
Gate input resistance
1.2
Ω
4/16
Doc ID 13833 Rev 7
STD85N3LH5
Electrical characteristics
Table 6.
Symbol
t
d(on)
t
r
t
d(off)
t
f
Switching on/off (inductive load)
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 15 V, I
D
= 40 A,
R
G
= 4.7
Ω,
V
GS
= 5 V
Figure 15
Min.
Typ.
6
14
23.6
10.8
Max.
Unit
ns
ns
ns
ns
Table 7.
Symbol
I
SD
I
SDM
(1)
Source drain diode
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 40 A, V
GS
= 0
I
SD
= 80 A,
di/dt = 100 A/µs,
V
DD
= 20 V
Figure 17
31.8
26.1
1.6
Test conditions
Min.
Typ.
Max.
80
320
1.1
Unit
A
A
V
ns
nC
A
V
SD(2)
t
rr
Q
rr
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Doc ID 13833 Rev 7
5/16
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