DPS256X16BJ3-35M datasheet, PDF

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DPS256X16BJ3-35M: DescriptionSRAM Module, 512KX8, 35ns, CMOS, CQCC48, HERMETIC SEALED, CERAMIC, J LEADED, MODULE, SLCC-48; Categorystorage storage; File Size802KB，10 Pages; ManufacturerB&B Electronics Manufacturing Company

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DPS256X16BJ3-35M Overview

SRAM Module, 512KX8, 35ns, CMOS, CQCC48, HERMETIC SEALED, CERAMIC, J LEADED, MODULE, SLCC-48

DPS256X16BJ3-35M Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	B&B Electronics Manufacturing Company
Parts packaging code	LCC
package instruction	AQCCJ, LDCC48,.51X.88
Contacts	48
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	35 ns
Other features	USER CONFIGURABLE AS 256K X 16
I/O type	COMMON
JESD-30 code	R-CQCC-J48
JESD-609 code	e0
memory density	4194304 bit
Memory IC Type	SRAM MODULE
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512KX8
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	AQCCJ
Encapsulate equivalent code	LDCC48,.51X.88
Package shape	RECTANGULAR
Package form	CHIP CARRIER, PIGGYBACK
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum seat height	10.3886 mm
Maximum standby current	0.0072 A
Minimum standby current	2 V
Maximum slew rate	0.39 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD

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4 Megabit High Speed CMOS SRAM

DPS256X16Cn3/DPS256X16Bn3

DESCRIPTION:

The DPS256X16Cn3/DPS256X16Bn3 High Speed SRAM ‘’STACK’’

modules are a revolutionary new memory subsystem using Dense-Pac

Microsystems’ ceramic Stackable Leadless Chip Carriers (SLCC).

Available in straight leaded, ‘’J’’ leaded or gullwing leaded packages,

or mounted on a 50-pin PGA co-fired ceramic substrate. The module

packs 4-Megabits of low-power CMOS static RAM in an area as small

as 0.463 in

, while maintaining a total height as low as 0.349 inches.

The DPS256X16Cn3/DPS256X16Bn3 STACK modules contain four

individual 128K x 8 SRAMs, each packaged in a hermetically sealed

SLCC, making the modules suitable for commercial, industrial and

military applications.

The DPS256X16Bn3 has one active low Chip Enable (CE) and while

the DPS256X16Cn3 an active low Chip Enable (CE) and an active high

Select Line (SEL).

By using SLCCs, the ‘’Stack’’ family of modules offer a higher board

density of memory than available with conventional through-hole,

surface mount or hybrid techniques.

SLCC Stack

Straight Leaded

Stack

FEATURES:

•

Organizations Available: 256Kx16 or 512Kx8

Access Times: 20*, 25, 30, 35, 45ns

Fully Static Operation - No clock or refresh required

Single +5V Power Supply,

10% Tolerance

TTL Compatible

Common Data Inputs and Outputs

Low Data Retention Voltage: 2.0V min.

Packages Available:

48 - Pin SLCC Stack

48 - Pin Straight Leaded Stack

48 - Pin ‘’J’’ Leaded Stack

48 - Pin Gullwing Leaded Stack

50 - Pin PGA Dense-Stack

‘’J’’ Leaded

Stack

Commercial only.

Dense-Stack

Gullwing

Leaded Stack

30A097-34

REV. G

This document contains information on a product that is currently released

to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the

right to change products or specifications herein without prior notice.

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