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2N5912-E3

Description
Small Signal Field-Effect Transistor, N-Channel, Junction FET
CategoryDiscrete semiconductor    The transistor   
File Size78KB,7 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Environmental Compliance
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2N5912-E3 Overview

Small Signal Field-Effect Transistor, N-Channel, Junction FET

2N5912-E3 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instruction,
Reach Compliance Codeunknow
FET technologyJUNCTION
JESD-609 codee3
Humidity sensitivity level1
Maximum operating temperature150 °C
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)0.5 W
surface mountNO
Terminal surfaceMatte Tin (Sn)
Base Number Matches1
2N5911/5912
Vishay Siliconix
Matched N-Channel JFET Pairs
PRODUCT SUMMARY
Part Number
2N5911
2N5912
V
GS(off)
(V)
–1 to –5
–1 to –5
V
(BR)GSS
Min (V)
–25
–25
g
fs
Min (mS)
5
5
I
G
Typ (pA)
–1
–1
jV
GS1
– V
GS2
j
Max (mV)
10
15
FEATURES
D
D
D
D
D
D
Two-Chip Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 1 pA
Low Noise
High CMRR: 85 dB
BENEFITS
D
Minimum Parasitics Ensuring Maximum
High-Frequency Performance
D
Improved Op Amp Speed, Settling Time Accuracy
D
Minimum Input Error/Trimming Requirement
D
Insignificant Signal Loss/Error Voltage
D
High System Sensitivity
D
Minimum Error with Large Input Signal
APPLICATIONS
D
Wideband Differential Amps
D
High-Speed, Temp-Compensated,
Single-Ended Input Amps
D
High Speed Comparators
D
Impedance Converters
DESCRIPTION
The 2N5911/5912 are matched pairs of JFETs mounted in a
TO-78 package. This two-chip design reduces parasitics and
gives better performance at high frequencies while ensuring
extremely tight matching.
The hermetically-sealed TO-78 package is available with full
military screening per MIL-S-19500 (see Military Information).
For similar products see the SO-8 packaged
SST440/SST441, the TO-71 packaged U440/U441, the
low-noise SST/U401 series, and the low-leakage U421/423
data sheets.
TO-78
S
1
1
7
G
2
D
1
2
6
D
2
3
G
1
4
Case
Top View
5
S
2
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –25 V
Gate-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
"80
V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Lead Temperature (
1
/
16
” from case for 10 sec.) . . . . . . . . . . . . . . . . . . . 300_C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 200_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
For applications information see AN102.
Document Number: 70255
S-04031—Rev. D, 04-Jun-01
www.vishay.com
Power Dissipation :
Per Side
a
. . . . . . . . . . . . . . . . . . . . . . . . 367 mW
Total
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
Notes
a. Derate 3 mW/_C above 25_C
b. Derate 4 mW/_C above 25_C
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