IRFD9220
Data Sheet
July 1999
File Number
2286.3
0.6A, 200V, 1.500 Ohm, P-Channel Power
MOSFET
Title
FD
20)
b-
t (-
A, -
0V,
00
m,
an-
wer
OS-
T)
utho
ey-
rds
ter-
rpo-
on,
an-
wer
OS-
T,
X-
P)
e-
r ()
OCI
O
f-
rk
This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17502.
Features
• 0.6A, 200V
• r
DS(ON)
= 1.500
Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
D
Ordering Information
PART NUMBER
IRFD9220
PACKAGE
HEXDIP
BRAND
IRFD9220
G
S
NOTE: When ordering, use the entire part number.
Packaging
HEXDIP
DRAIN
GATE
SOURCE
©2001 Fairchild Semiconductor Corporation
IRFD9220 Rev. A
IRFD9220
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRFD9220
-200
-200
-0.6
-4.8
±
20
1.0
0.008
290
-55 to 150
300
260
UNITS
V
V
A
A
V
W
W/
o
C
mJ
o
C
o
C
o
C
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J,
T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
DSS
TEST CONDITIONS
I
D
= -250
µ
A, V
GS
= 0V, (Figure 9)
V
GS
= V
DS
, I
D
= -250
µ
A
V
DS
= Rated BV
DSS
, V
GS
= 0V
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
C
= 125
o
C
MIN
-200
-2.0
-
-
-0.6
-
-
0.6
-
-
-
-
-
-
-
V
DS
= -25V, V
GS
= 0V, f = 1MHz, (Figure 10)
-
-
-
Measured From the Drain
Lead, 2.0mm (0.08in) From
Header to Center of Die
Measured From the Source
Lead, 0.2mm (0.08in) From
Header to Source Bonding
Pad
Modified MOSFET
Symbol Showing the In-
ternal Devices
Inductances
D
L
D
G
L
S
S
TYP
-
-
-
-
-
-
MAX
-
-4.0
-25
-250
-
±
500
UNITS
V
V
µ
A
µ
A
A
nA
Ω
S
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
nH
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
Zero Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate to Source Leakage Current
On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Internal Drain Inductance
I
D(ON)
I
GSS
r
DS(ON)
gfs
t
d(ON)
t
r
t
d(OFF)
t
f
Q
g(TOT)
Q
gs
Q
gd
C
ISS
C
OSS
C
RSS
L
D
V
DS
> I
D(ON)
x r
DS(ON)MAX
, V
GS
= -10V
V
GS
=
±
20V
I
D
= -0.3A, V
GS
= -10V, (Figures 7, 8)
V
DS
< 50V, I
D
= -0.3A, (Figure 11)
V
DD
= 0.5 x Rated BV
DSS
, I
D
≈
0.6A, R
G
= 9.1
Ω
V
GS
= -10V, (Figures 16, 17)
R
L
= 165
Ω
for V
DD
= 100V
MOSFET Switching Times are Essentially Indepen-
dent of Operating Temperature.
V
GS
= -10V, I
D
= -0.6A, V
DS
= 0.8 x Rated BV
DSS
,
I
G(REF)
= 1.5mA, (Figures 13, 18, 19)
Gate Charge is Essentially Independent of Operating
Temperature
1.000 1.500
1.0
15
25
80
50
16
10
4
350
100
30
4.0
-
40
50
120
75
22
-
-
-
-
-
-
-
Internal Source Inductance
L
S
-
6.0
-
nH
Thermal Resistance Junction to Ambient
R
θ
JA
Typical Socket Mount
-
-
120
o
C/W
©2001 Fairchild Semiconductor Corporation
IRFD9220 Rev. A
IRFD9220
Source to Drain Diode Specifications
PARAMETER
Continuous Source to Drain Current
Pulse Source to Drain Current
(Note 3)
SYMBOL
I
SD
I
SDM
TEST CONDITIONS
Modified MOSFET Symbol
Showing the Integral Re-
verse P-N Junction Diode
G
D
MIN
-
-
TYP
-
-
MAX
-0.6
-4.8
UNITS
A
A
S
Source to Drain Diode Voltage (Note 2)
Reverse Recovery Time
Reverse Recovery Charge
NOTES:
V
SD
t
rr
Q
RR
T
C
= 25
o
C, I
SD
= -0.6A, V
GS
= 0V (Figure 12)
T
J
= 150
o
C, I
SD
= -0.6A, dI
SD
/dt = 100A/
µ
s
T
J
= 150
o
C, I
SD
= -0.6A, dI
SD
/dt = 100A/
µ
s
-
-
-
-
150
0.5
-1.5
-
-
V
ns
µ
C
2. Pulse test: pulse width
≤
300
µ
s, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature.
4. V
DD
= 25V, starting T
J
= 25
o
C, L = 1210mH, R
G
= 25Ω, Peak I
AS
= 0.6A (Figures 14, 15).
Typical Performance Curves
1.2
1.0
0.8
Unless Otherwise Specified
-0.6
I
DS
, DRAIN TO SOURCE CURRENT (A)
POWER DISSIPATION MULTIPLIER
-0.4
0.6
0.4
-0.2
0.2
0
0
25
125
50
75
100
o
C)
T
A
, AMBIENT TEMPERATURE (
150
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
-10
-5
-10V
-9V
V
GS
= -7V
V
GS
= -8V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
I
D
, DRAIN CURRENT (A)
-1.0
10µs
100µs
1ms
I
D
, DRAIN CURRENT (A)
-4
-3
V
GS
= -6V
-2
V
GS
= -5V
-1
V
GS
= -4V
0
-0.1
OPERATION IN THIS AREA
IS LIMITED BY r
DS(ON)
-0.01
T
C
= 25
o
C
TJ = MAX RATED
SINGLE PULSE
-1.0
-10
-100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10ms
100ms
DC
-500
0
-10
-20
-0.002
-0.2
-30
-40
-50
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
FIGURE 4. OUTPUT CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
IRFD9220 Rev. A
IRFD9220
Typical Performance Curves
-5
I
DS
, DRAIN TO SOURCE CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
-4
V
GS
= -7V
Unless Otherwise Specified
(Continued)
I
DS(ON)
, DRAIN TO SOURCE CURRENT (A)
-5
V
GS
= -8V
-3
V
GS
= -9V
V
GS
= -10V
-2
V
GS
= -6V
V
GS
= -5V
-1
V
GS
= -4V
0
0
-1
-2
-3
-4
-5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-4
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DS
≥
I
D(ON)
x r
DS(ON)
MAX
T
J
= 125
o
C
T
J
= 25
o
C
T
J
= -55
o
C
-3
-2
-1
0
0
-2
-4
-6
-8
V
GS
, GATE TO SOURCE VOLTAGE (V)
-10
FIGURE 5. SATURATION CHARACTERISTICS
1.5
2.0µs PULSE TEST
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
r
DS(ON)
, DRAIN TO SOURCE
FIGURE 6. TRANSFER CHARACTERISTICS
PULSE DURATION = 80µs
-2.5 DUTY CYCLE = 0.5% MAX.
V
GS
= -10V, I
D
= -0.3A
-2.0
ON RESISTANCE (Ω)
V
GS
= - 10V
1.0
V
GS
= - 20V
-1.5
0.5
-1.0
-0.5
0
0
-1
-2
-3
I
D
, DRAIN CURRENT (A)
-4
-5
0
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
NOTE: Effect of 2.0µs pulse is minimal.
FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 8. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.15
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
I
D
= 250µA
1.10
1.05
1.00
0.95
0.90
0.85
-80
C, CAPACITANCE (pF)
500
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
= C
DS
+ C
GD
C
ISS
400
300
200
C
OSS
C
RSS
100
-40
0
40
80
120
160
0
0
-10
-20
-30
-40
-50
T
J
, JUNCTION TEMPERATURE (
o
C)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
©2001 Fairchild Semiconductor Corporation
IRFD9220 Rev. A
IRFD9220
Typical Performance Curves
4
g
fs
, TRANSCONDUCTANCE (S)
V
DS
≥
I
D(ON)
x r
DS(ON)MAX
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
T
J
= -55
o
C
T
J
= 25
o
C
2
T
J
= 125
o
C
I
SD
, DRAIN CURRENT (A)
Unless Otherwise Specified
(Continued)
-100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
3
-10
T
J
= 150
o
C
-1.0
T
J
= 25
o
C
1
0
0
-1
-2
-3
I
D
, DRAIN CURRENT (A)
-4
-5
-0.1
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
-1.8
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
0
I
D
= -3.6A
V
GS
, GATE TO SOURCE (V)
-5
-10
V
DS
= -40V
V
DS
= -100V
V
DS
= -160V
-15
-20
0
4
8
12
16
20
Q
g(TOT)
, TOTAL GATE CHARGE (nC)
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
V
DS
t
AV
L
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
R
G
0
+
-
0V
V
GS
DUT
t
P
I
AS
0.01Ω
V
DD
V
DD
I
AS
t
P
BV
DSS
V
DS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
©2001 Fairchild Semiconductor Corporation
IRFD9220 Rev. A
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