HCT801
MECHANICAL DATA
Dimensions in mm (inches)
COMPLEMENTARY
SWITCHING TRANSISTORS IN A
HERMETICALLY SEALED
CERAMIC SURFACE MOUNT
PACKAGE FOR HIGH RELIABILITY
APPLICATIONS
V
DS
= 90V
I
D(on)
N-Channel = 1.9A
P-Channel = 0.5A
2.29 ± 0.20
(0.09 ± 0.008)
1.65 ± 0.13
(0.065 ± 0.005)
0.64 ± 0.08
(0.025 ± 0.003)
1.40 ± 0.15
(0.055 ± 0.006)
FEATURES
4.32 ± 0.13
(0.170 ± 0.005)
2.54 ± 0.13
(0.10 ± 0.005)
2
1
3
4
5
• COMPLEMENTARY N-CHANNEL /P-CHANNEL
MOSFETS
• HERMETIC CERAMIC SURFACE MOUNT
PACKAGE
• CECC SCREENING OPTIONS
• GOLD PLATED CONTACTS
• TWO DEVICES SELECTED FOR VDS SWITCHING
TIME, AND CAPACITANCE SIMILARITY
A
6
0.23
rad.
(0.009)
1.27 ± 0.13
(0.05 ± 0.005)
6.22 ± 0.13
(0.245 ± 0.005)
A=
LCC2 – Ceramic Surface Mount Package
P-CHANNEL
2 = Gate
1 = Drain
6 = Source
N-CHANNEL
3 =Gate
4 = Drain
5 = Source
DESCRIPTION
The HCT801 offers an N-Channel and P-Channel
MOS transistor packaged in a hermetic ceramic
surface mount package. The two devices are
similar in performance to the VN0109 N-Channel
device and VP0109 P-Channel device.
ABSOLUTE MAXIMUM RATINGS
(T
case
= 25°C unless otherwise stated)
Drain-Source Voltage
Gate-Source Voltage
Drain Current (Limited by Tj max)
N-Channel
P-Channel
PD
Power Dissipation @ Tamb = 25°C (Both devices equally driven)
PD
Power Dissipation @ TPCB = 25°C (Both devices equally driven)
TJ , Tstg Operating and Storage Tempererature
Note:
(1)
This rating is provided as an aid to designers. It is dependent upon mounting material and
methods and is not measureable as an outgoing test.
90V
20V
2A
0.8A
0.5W Total
1.25W Total(1)
-55 to 150°C
Semelab plc.
Telephone +44(0)1455) 556565. Fax +44(0)1455) 552612.
E-mail:
sales@semelab.co.uk
Website:
http://www.semelab.co.uk
Prelim. 4/99
HCT801
ELECTRICAL CHARACTERISTICS
(Tamb = 25°C unless otherwise stated)
Parameter
Off Characteristics
B
VDSS
V
TH
I
GSS
I
DSS
I
D(on)
Drain-Source Breakdown
Gate Threshold Voltage
Gate-body Leakage
Zero Gate Voltae Drain Current
ON-state Drain Current
I
D
= 1mA*
I
D
= 1mA*
V
DS
= 0
V
DS
= 90V*
V
DS
= 25V*
V
DS
= 25V*
I
D
= 250mA
R
DS(on)
Drain Source On-Resistance
I
D
= 1A
I
D
= -0.1A
I
D
= -0.5A
High Temperature Drain Source On
Resistance
G
fs
C
iss
C
oss
C
rss
t
on
t
off
Forward Transconductance
Input Capacitance
Common Source Output Capcitance
Reverse Transfer Capacitance
Turn On Time
Turn Off Time
V
GS
= 0
V
GS
= V
DS
V
GS
= +20V
V
GS
= 0V
V
GS
= 5V*
V
GS
= 10V*
V
GS
= 5V
V
GS
= 10V
V
GS
= -5V
V
GS
= -10V
0.9
14
250
70
35
10
I
D
= 1A
16
17
150
70
35
10
16
17
ns
pf
0.5
1.9
5.2
3.2
15
8
90
0.75
2.5
+100
10
-0.15
-0.5
90
-1.4
-3.7
+100
-10
V
V
nA
Test Conditions
N-CHANNEL P-CHANNEL
Min. Max. Min. Max. Unit
m
A
A
W
W
mmho
I
D
= 1A,V
GS
= 10V, T
A
=125°C
I
D
= -0.5A,V
GS
=-10V, T
A
=125°C
I
D
= 0.5A*
V
DS
= 90V*
f = 1MHz
V
DD
= 25V*
V
DS
= 25V*
V
GS
= 0
R
S
=R
L
=50
W
* Reverse polarity for the P-Channel device
1 Pulse Test: Pulse Width
£
300ms,
d £
2%
Semelab plc.
Telephone +44(0)1455) 556565. Fax +44(0)1455) 552612.
E-mail:
sales@semelab.co.uk
Website:
http://www.semelab.co.uk
Prelim. 4/99
FPGA/CPLD
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