PCK942PBD datasheet, PDF - EEWORLD Datasheet

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PCK942PBD: DescriptionLow voltage 1 : 18 clock distribution chip; Categorylogic logic; File Size49KB，11 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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PCK942PBD Overview

Low voltage 1 : 18 clock distribution chip

PCK942PBD Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	QFP
package instruction	LQFP, QFP32,.35SQ,32
Contacts	32
Reach Compliance Code	unknow
Other features	ALSO OPERATES AT 3.3 V SUPPLY
series	942
Input adjustment	DIFFERENTIAL
JESD-30 code	S-PQFP-G32
length	7 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
MaximumI(ol)	0.02 A
Number of functions	1
Number of inverted outputs
Number of terminals	32
Actual output times	18
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP32,.35SQ,32
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
power supply	2.5/3.3 V
Prop。Delay @ Nom-Su	4.3 ns
propagation delay (tpd)	4.3 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.2 ns
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	2.625 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
width	7 mm
minfmax	250 MHz
Base Number Matches	1

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PCK942P

Low voltage 1 : 18 clock distribution chip

Rev. 01 — 17 February 2006

Product data sheet

1. General description

The PCK942P is a 1 : 18 low voltage clock distribution chip with 2.5 V or 3.3 V LVCMOS

output capabilities. The device is offered in two versions: the PCK942C has an LVCMOS

input clock, while the PCK942P has a LVPECL input clock. The 18 outputs are 2.5 V or

3.3 V LVCMOS compatible and feature the drive strength to drive 50

Ω

series-terminated

transmission lines. With output-to-output skews of 200 ps, the PCK942P is ideal as a

clock distribution chip for the most demanding of synchronous systems. The 2.5 V output

also makes the device ideal for supplying clocks for a higher performance Pentium II

microprocessor-based design.

With a low output impedance of approximately 12

Ω,

in both the HIGH and LOW logic

states, the output buffers of the PCK942P are ideal for driving series-terminated

transmission lines. With an output impedance of 12

Ω,

the PCK942P can drive two

series-terminated transmission lines from each output. This capability gives the PCK942P

an effective fan-out of 1 : 36. The PCK942P provides enough copies of low skew clocks

for most high performance synchronous systems.

The differential LVPECL inputs of the PCK942P allow the device to interface directly with a

LVPECL fan-out buffer like the MC100EP111 to build very wide clock fan-out trees or to

couple to a high frequency clock source. The OE pin will place the outputs to a

high-impedance state. The OE pin has an internal pull-up resistor.

The PCK942P is a single supply device. The V

power pins require either 2.5 V or 3.3 V.

The 32-lead LQFP package was chosen to optimize performance, board space, and cost

of the device. The 32-lead LQFP package has a 7 mm

7 mm body size with a

conservative 0.8 mm pin spacing.

2. Features

LVPECL clock input

2.5 V LVCMOS outputs for Pentium II microprocessor support

200 ps maximum targeted output-to-output skew

Maximum output frequency of 250 MHz at 3.3 V V

32-lead LQFP packaging

Single 3.3 V or 2.5 V supply voltage

PCK942PBD Related Products

	PCK942PBD	PCK942P
Description	Low voltage 1 : 18 clock distribution chip	Low voltage 1 : 18 clock distribution chip

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