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BAS40DW-05

Description
Diode
CategoryDiscrete semiconductor    diode   
File Size133KB,2 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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BAS40DW-05 Overview

Diode

BAS40DW-05 Parametric

Parameter NameAttribute value
MakerJCET
Reach Compliance Codeunknown

BAS40DW-05 Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOT-363 Plastic-Encapsulate Transistors
BAS40TW/DW-04/DW-05/DW-06/BRW
SCHOTTKY BARRIER DIODE ARRAYS
FEATURES
Low Forward voltage drop
Fast switching
SOT-363
Maximum Ratings @T
A
=25℃
Parameter
Non-Repetitive Peak reverse voltage
DC Blocking Voltage
Average Rectified Output Current
Power Dissipation
Thermal Resistance. Junction to Ambient Air
Junction temperature
Storage temperature range
Symbol
V
RM
V
R
I
O
Pd
R
θ
JA
T
J
T
STG
Limits
40
200
200
625
-55-125
-65-125
Unit
V
mA
mW
℃/W
ELECTRICAL CHARACTERISTICS (Tamb=25℃
Parameter
Reverse breakdown voltage
Reverse voltage
Forward
Total
voltage
leakage current
Symbol
V
(BR)
I
R
V
F
C
T
t
rr
unless
Test
I
R
= 10
µ
A
V
R
=30V
I
F
=1mA
I
F
=40mA
V
R
=0,f=1MHz
otherwise
specified)
MIN
40
200
380
1000
5
5
MAX
UNIT
V
nA
mV
conditions
capacitance
pF
nS
Reverse recovery time
I
F
=10mA, I
R
=I
F
=1mA
R
L
=100Ω
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