DM74ALS174, DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
May 2007
DM74ALS174, DM74ALS175
Hex/Quad D-Type Flip-Flops with Clear
Features
■
Advanced oxide-isolated ion-implanted Schottky
tm
General Description
These positive-edge-triggered flip-flops utilize TTL
circuitry to implement D-type flip-flop logic. Both have an
asynchronous clear input, and the quad (DM74ALS175)
version features complementary outputs from each
flip-flop.
Information at the D inputs meeting the setup time
requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse. Clock triggering
occurs at a particular voltage level and is not directly
related to the transition time of the positive-going pulse.
When the clock input is at either the HIGH or LOW level,
the D input signal has no effect at the output.
TTL process
■
Pin and functional compatible with LS family
counterpart
■
Typical clock frequency maximum is 80MHz
■
Switching performance guaranteed over full
temperature and V
CC
supply range
Ordering Information
Ordering
Code
DM74ALS174M
DM74ALS174SJ
DM74ALS175M
DM74ALS175SJ
DM74ALS175N
Package
Number
M16A
M16D
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number.
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
DM74ALS174, DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
Connection Diagrams
DM74ALS174
DM74ALS175
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
2
DM74ALS174, DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
Function Table
Inputs
Clear
L
H
H
H
Outputs
D
X
H
L
X
Clock
X
↑
↑
L
Q
L
H
L
Q
0
Q
(1)
H
L
H
Q
0
H
=
HIGH Level (steady state)
L
=
LOW Level (steady state)
X
=
Don't Care
↑ =
Transition from LOW-to-HIGH Level
Q
0
=
the level of Q before the indicated steady-state input conditions were established.
Note:
1. Applies to DM74ALS175 only.
Logic Diagrams
DM74ALS174
DM74ALS175
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
3
DM74ALS174, DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
I
T
A
T
STG
θ
JA
Supply Voltage
Input Voltage
Parameter
Rating
7V
7V
0°C to +70°C
–65°C to +150°C
77.9°C/W
107.3°C/W
Operating Free Air Temperature Range
Storage Temperature Range
Typical Thermal Resistance
N Package
M Package
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
t
W
t
SETUP
t
HOLD
f
CLOCK
T
A
Parameter
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Pulse Width
Setup Time
(2)
Data Hold Time
(2)
Clock Frequency
Free Air Operating Temperature
Clock HIGH or LOW
Clear LOW
Data Input
Clear, Inactive State
Min.
4.5
2
Nom.
5
Max.
5.5
0.8
–0.4
8
Units
V
V
V
mA
mA
ns
ns
ns
10
10
10
↑
6
↑
0
↑
0
0
50
70
MHz
°C
Note:
2. The symbol
↑
indicates that the rising edge of the clock is used as reference.
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
4
DM74ALS174, DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
Electrical Characteristics
Over recommended operating free air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25°C.
Symbol
V
IK
V
OH
V
OL
I
I
I
IH
I
IL
I
O
I
CC
Parameter
Input Clamp Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
Input Current at Max. Input
Voltage
HIGH Level Input Current
LOW Level Input Current
Output Drive Current
Supply Current
Conditions
V
CC
=
4.5V, I
IN
=
–18 mA
I
OH
=
–400µA, V
CC
=
4.5V to 5.5V
V
CC
=
4.5V, I
OL
=
8mA
V
CC
=
5.5V, V
IN
=
7V
V
CC
=
5.5V, V
IH
=
2.7V
V
CC
=
5.5V, V
IN
=
0.4V
V
CC
=
5.5V, V
O
=
2.25V
V
CC
=
5.5V,
Clock
=
4.5V,
Clear
=
GND,
D Input
=
GND
DM74ALS174
DM74ALS175
Min.
V
CC
– 2
Typ.
V
CC
– 1.6
0.35
Max.
–1.5
0.5
0.1
20
–0.1
Units
V
V
V
mA
µA
mA
mA
mA
–30
11
8
–112
19
14
Switching Characteristics
Over recommended operating free air temperature range.
Symbol
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Maximum Clock Frequency
Propagation Delay Time, LOW-to-HIGH Level
Output From Clear (175 Only)
Propagation Delay Time, HIGH-to-LOW Level
Output From Clear
Propagation Delay Time, LOW-to-HIGH Level
Output From Clock
Propagation Delay Time, HIGH-to-LOW Level
Output From Clock
Conditions
R
L
=
500
Ω
,
C
L
=
50pF,
V
CC
=
4.5V to 5.5V
Min.
50
5
8
3
5
Max.
18
23
15
17
Units
MHz
ns
ns
ns
ns
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
5
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