EEWORLDEEWORLDEEWORLD

Part Number

Search

51446-1098EC

Description
Board Connector, 294 Contact(s), 3 Row(s), Female, Right Angle, Solder Terminal, Receptacle
CategoryThe connector    The connector   
File Size281KB,3 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Download Datasheet Parametric View All

51446-1098EC Overview

Board Connector, 294 Contact(s), 3 Row(s), Female, Right Angle, Solder Terminal, Receptacle

51446-1098EC Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerAmphenol
Reach Compliance Codecompliant
Body/casing typeRECEPTACLE
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD (30)
Contact completed and terminatedTin/Lead (Sn/Pb)
Contact point genderFEMALE
Contact materialBERYLLIUM COPPER
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee0
MIL complianceNO
Mixed contactsNO
Installation methodRIGHT ANGLE
Installation typeBOARD
Number of rows loaded3
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typeSOLDER
Total number of contacts294
UL Flammability Code94V-0
PDM: Rev:D
STATUS:
Released
Printed: Sep 27, 2003
The National Electronics Design Competition starts today!
[i=s]This post was last edited by paulhyde on 2014-9-15 09:29[/i] [size=6][color=magenta]I hope all the students who are participating in the National Electronic Design Competition today will do their...
lk972105 Electronics Design Contest
Very frustrating question, thank you for your help, give points immediately!!!
The interrupt service routine (ISR) of VxWorks runs in a specific space. Unlike general tasks, the interrupt service routine has no task context and does not contain a task control block. All interrup...
gongjin618 Embedded System
C51 and AVR learning
Fans who are learning avr, please come in...
gongjian2100 MCU
Problems encountered when simulating Xilinx Cordic IP core
C_SHIFT_RAM_V7_0 # Loading D:\X\ISE\verilog\mti_se\XilinxCoreLib_ver.C_ADDSUB_V7_0 # Loading D:\X\ISE\verilog\mti_se\XilinxCoreLib_ver.C_MUX_BIT_V7_0 # Loading D:\X\ISE\verilog\mti_se\unisims_ver.LUT4...
uestcyanglin FPGA/CPLD
There is a symbol I don't understand in the calculation formula for the op amp circuit!
What does the “(D)10” in the picture mean?...
kevinyuhui 51mcu
Seeking guidance on implementing CAN protocol on FPGA
Could anyone please tell me how to implement CAN protocol using FPGA? Is there any FPGA chip with built-in CAN protocol? If not, how can I implement the CAN protocol module on FPGA? Or use physical co...
大萝卜的小蝌蚪 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2080  1860  2682  2252  2380  42  38  54  46  48 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号