SI5338A-A-GM datasheet, PDF - EEWORLD Datasheet

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SI5338A-A-GM: DescriptionIC,MISCELLANEOUS CLOCK GENERATOR,LLCC,24PIN,PLASTIC; Categorysemiconductor The embedded processor and controller; File Size591KB，170 Pages; ManufacturerSILABS; Websitehttp://www.silabs.com

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SI5338A-A-GM Overview

IC,MISCELLANEOUS CLOCK GENERATOR,LLCC,24PIN,PLASTIC

SI5338A-A-GM Parametric

Parameter Name	Attribute value
Lead-free	Yes
EU RoHS regulations	Yes
state	EOL/LIFEBUY
terminal coating	NOT SPECIFIED

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Si5338

C - P

R O G R A M M A B LE

N Y

- F

R E Q U E N C Y

, A

N Y

-O

UTPU T

U A D

L OC K

E N E R A T O R

Features



CLK0A

CLK0B

VDD

VDDO0



Low power MultiSynth™ technology



enables independent, any-frequency

synthesis on four differential output



drivers

Highly-configurable output drivers with

up to four differential outputs, eight

single-ended clock outputs, or a



combination of both

Low phase jitter of 0.7 ps RMS typ

High precision synthesis allows true



zero ppm frequency accuracy on all

outputs

Flexible input reference:



External crystal: 8 to 30 MHz



CMOS input: 5 to 200 MHz



SSTL/HSTL input: 5 to 350 MHz





Differential input: 5 to 710 MHz



Independently configurable outputs

support any frequency or format:



LVPECL/LVDS: 0.16 to 710 MHz





HCSL: 0.16 to 250 MHz





CMOS: 0.16 to 200 MHz





SSTL/HSTL: 0.16 to 350 MHz



Independent output voltage per driver:



1.5, 1.8, 2.5, or 3.3 V

RSVD_GND

C/SMBus compatible interface

Easy to use programming software

Small size: 4 x 4 mm, 24-QFN

Low power: 45 mA core supply typ

Wide temperature range: –40 to

+85 °C

CLK1A

CLK1B

VDDO1

VDDO2

CLK2A

CLK2B

IN1

IN2

IN3

IN4

IN5

GND

Pad

Applications



Ethernet switch/router

PCI Express 2.0/3.0

Broadcast video/audio timing

Processor and FPGA clocking



Any-frequency clock conversion

MSAN/DSLAM/PON

Fibre Channel, SAN

Telecom line cards

IN6

INTR

Description

The Si5338 is a high-performance, low-jitter clock generator capable of

synthesizing any frequency on each of the device's four output drivers. This timing

IC is capable of replacing up to four different frequency crystal oscillators or

operating as a frequency translator. Using its patented MultiSynth™ technology,

the Si5338 allows generation of four independent clocks with 0 ppm precision.

Each output clock is independently configurable to support various signal formats

and supply voltages. The Si5338 provides low-jitter frequency synthesis in a

space-saving 4 x 4 mm QFN package. The device is programmable via an I

SMBus-compatible serial interface and supports operation from a 1.8, 2.5, or

3.3 V core supply. I

C device programming is made easy with the ClockBuilder™

Desktop software available at

www.silabs.com/ClockBuilder.

Rev. 0.6 9/10

VDDO3

CLK3B

CLK3A

VDD

SCL

SDA

Single supply core with excellent

PSRR: 1.8, 2.5, 3.3 V

Independent frequency increment/

decrement feature enables

glitchless frequency adjustments in

1 ppm steps

Independent phase adjustment on

each of the output drivers with an

accuracy of <20 ps steps

Highly configurable spread

spectrum (SSC) on any output:



Any frequency from 5 to 350 MHz



Any spread from 0.5 to 5.0%



Any modulation rate from 33 to

63 kHz

External feedback mode allows

zero-delay mode

Loss of lock and loss of signal

alarms

Ordering Information:

See page 168.

Pin Assignments

Top View

Si5338

Si5338

ABLE O F

ONTENTS

Section

Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

2. Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.2. Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.3. Synthesis Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.4. Output Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

3.5. Configuring the Si5338 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.6. Status Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.7. Output Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.8. Reset Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.9. Features of the Si5338 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4. Applications of the Si5338 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

4.1. Free-Running Clock Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.2. Synchronous Frequency Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.3. Configurable Buffer and Level Translator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5. I

6. Si5338 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6.1. Register Write-Allowed Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6.2. Register Categories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

6.3. Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

6.4. Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

7. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

8. Device Pinout by Part Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164

9. Package Outline: 24-Lead QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166

10. Recommended PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167

11. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .170

Rev. 0.6

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