L8C402CC50 datasheet, PDF - EEWORLD Datasheet

L8C402CC50: DescriptionFIFO, 64X5, 17ns, Asynchronous, CMOS, CDIP18, 0.300 INCH, CERDIP-18; Categorystorage storage; File Size400KB，9 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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L8C402CC50 Overview

FIFO, 64X5, 17ns, Asynchronous, CMOS, CDIP18, 0.300 INCH, CERDIP-18

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	DIP
package instruction	DIP,
Contacts	18
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	17 ns
period time	20 ns
JESD-30 code	R-GDIP-T18
length	23.114 mm
memory density	320 bit
memory width	5
Humidity sensitivity level	3
Number of functions	1
Number of terminals	18
word count	64 words
character code	64
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64X5
Output characteristics	TOTEM POLE
Exportable	NO
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm

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