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MRF21125S

Description
RF POWER FIELD EFFECT TRANSISTORS
CategoryDiscrete semiconductor    The transistor   
File Size381KB,12 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

MRF21125S Overview

RF POWER FIELD EFFECT TRANSISTORS

MRF21125S Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMotorola ( NXP )
package instructionFLATPACK, R-CDFP-F2
Contacts3
Manufacturer packaging codeCASE 465C-02
Reach Compliance Codeunknow
Shell connectionSOURCE
ConfigurationSINGLE
Minimum drain-source breakdown voltage65 V
FET technologyMETAL-OXIDE SEMICONDUCTOR
highest frequency bandS BAND
JESD-30 codeR-CDFP-F2
JESD-609 codee0
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature200 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formFLAT
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsAMPLIFIER
Transistor component materialsSILICON
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MRF21125/D
The RF Sub–Micron MOSFET Line
RF Power Field Effect Transistors
N–Channel Enhancement–Mode Lateral MOSFETs
Designed for W–CDMA base station applications with frequencies from 2110
to 2170 MHz. Suitable for TDMA, CDMA and multicarrier amplifier applica-
t i o n s . To b e u s e d i n C l a s s A B f o r P C N – P C S / c e l l u l a r r a d i o a n d W L L
applications.
Typical 2–carrier W–CDMA Performance for V
DD
= 28 Volts, I
DQ
= 1600
mA, f1 = 2.1125 GHz, f2 = 2.1225 GHz, Channel bandwidth = 3.84 MHz,
adjacent channels at
±
5 MHz , ACPR and IM3 measured in 3.84 MHz
bandwidth. Peak/Avg = 8.5 dB @ 0.01% probability on CCDF.
Output Power — 20 Watts
Efficiency — 18%
Gain — 13 dB
IM3 — –43 dBc
ACPR — –45 dBc
100% Tested under 2–carrier W–CDMA
Internally Matched, Controlled Q, for Ease of Use
High Gain, High Efficiency and High Linearity
Integrated ESD Protection
Designed for Maximum Gain and Insertion Phase Flatness
Capable of Handling 5:1 VSWR, @ 28 Vdc, 2170 MHz, 125 Watts (CW)
Output Power
Excellent Thermal Stability
Characterized with Series Equivalent Large–Signal Impedance Parameters
Available in Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel.
MRF21125
MRF21125S
MRF21125SR3
2170 MHz, 125 W, 28 V
LATERAL N–CHANNEL
RF POWER MOSFETs
CASE 465B–03, STYLE 1
(NI–880)
(MRF21125)
CASE 465C–02, STYLE 1
(NI–880S)
(MRF21125S)
MAXIMUM RATINGS
Rating
Drain–Source Voltage
Gate–Source Voltage
Total Device Dissipation @ T
C
= 25°C
Derate above 25°C
Storage Temperature Range
Operating Junction Temperature
Symbol
V
DSS
V
GS
P
D
T
stg
T
J
Value
65
+15, –0.5
330
1.89
–65 to +150
200
Unit
Vdc
Vdc
Watts
W/°C
°C
°C
ESD PROTECTION CHARACTERISTICS
Test Conditions
Human Body Model
Machine Model
Class
2 (Minimum)
M3 (Minimum)
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
Symbol
R
θJC
Max
0.53
Unit
°C/W
NOTE –
CAUTION
– MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
REV 5
MOTOROLA RF
Motorola, Inc. 2002
DEVICE DATA
MRF21125 MRF21125S MRF21125SR3
1

MRF21125S Related Products

MRF21125S MRF21125 MRF21125SR3
Description RF POWER FIELD EFFECT TRANSISTORS RF POWER FIELD EFFECT TRANSISTORS RF POWER FIELD EFFECT TRANSISTORS
Maker Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP )
package instruction FLATPACK, R-CDFP-F2 FLANGE MOUNT, R-CDFM-F2 FLATPACK, R-CDFP-F2
Contacts 3 3 2
Manufacturer packaging code CASE 465C-02 CASE 465B-03 CASE 465C-02
Reach Compliance Code unknow unknow unknow
Configuration SINGLE SINGLE SINGLE
Minimum drain-source breakdown voltage 65 V 65 V 65 V
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
highest frequency band S BAND S BAND S BAND
JESD-30 code R-CDFP-F2 R-CDFM-F2 R-CDFP-F2
Number of components 1 1 1
Number of terminals 2 2 2
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 200 °C 200 °C 200 °C
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK FLANGE MOUNT FLATPACK
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL
Certification status Not Qualified Not Qualified Not Qualified
surface mount YES YES YES
Terminal form FLAT FLAT FLAT
Terminal location DUAL DUAL DUAL
transistor applications AMPLIFIER AMPLIFIER AMPLIFIER
Transistor component materials SILICON SILICON SILICON
Is it Rohs certified? incompatible incompatible -
Shell connection SOURCE SOURCE -
JESD-609 code e0 e0 -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
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