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HYS64V64220GBDL-7.5-C2

Description
Synchronous DRAM Module, 64MX64, 5.4ns, CMOS, SODIMM-144
Categorystorage    storage   
File Size459KB,13 Pages
ManufacturerInfineon
Websitehttp://www.infineon.com/
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HYS64V64220GBDL-7.5-C2 Overview

Synchronous DRAM Module, 64MX64, 5.4ns, CMOS, SODIMM-144

HYS64V64220GBDL-7.5-C2 Parametric

Parameter NameAttribute value
MakerInfineon
Parts packaging codeMODULE
package instruction,
Contacts144
Reach Compliance Codeunknown
ECCN codeEAR99
access modeDUAL BANK PAGE BURST
Maximum access time5.4 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-XDMA-N144
memory density4294967296 bit
Memory IC TypeSYNCHRONOUS DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals144
word count67108864 words
character code64000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize64MX64
Package body materialUNSPECIFIED
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Certification statusNot Qualified
self refreshYES
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal locationDUAL
144 pin SO-DIMM SDRAM Modules
HYS64V64220GBDL
512 MB PC100 / PC133
144 Pin Eight Byte Small Outline Dual-In-Line Synchronous DRAM Modules
for notebook applications
Two bank 64M x 64 non-parity module organisation
suitable for use in PC100 and PC133 applications
Performance:
-7.5
PC133
3-3-3
f
CK
t
AC
Clock frequency (max.)
Clock access time
CAS latency = 2 & 3
133
5.4
-8
PC100
2-2-2
100
6
Units
MHz
ns
Single +3.3V(± 0.3V ) power supply
Programmable CAS Latency, Burst Length and Wrap Sequence
(Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
Decoupling capacitors mounted on substrate
All inputs, outputs are LVTTL compatible
Serial Presence Detect with E
2
PROM
Uses BOC (“Board-on-Chip”) technique with 256Mbit SDRAM (32Mx8) chips.
8196 refresh cycles every 64 ms
Gold contact pad, JEDEC MO-190 outline dimensions
This module family is fully pin and functional compatible
with the latest INTEL SO-DIMM specification
Importante Notice
:
This SO-DIMM module is based on 256Mbit SDRAM technology and can be
used in applications only, where 256Mbit addressing is supported.
INFINEON Technologies
1
2002.01.25

HYS64V64220GBDL-7.5-C2 Related Products

HYS64V64220GBDL-7.5-C2 HYS64V64220GBDL-8 HYS64V64220GBDL-8-C2
Description Synchronous DRAM Module, 64MX64, 5.4ns, CMOS, SODIMM-144 Synchronous DRAM Module, 64MX64, 6ns, CMOS, PDMA144 Synchronous DRAM Module, 64MX64, 6ns, CMOS, SODIMM-144
Maker Infineon Infineon Infineon
Reach Compliance Code unknown unknown unknown
Maximum access time 5.4 ns 6 ns 6 ns
JESD-30 code R-XDMA-N144 R-PDMA-N144 R-XDMA-N144
memory density 4294967296 bit 4294967296 bit 4294967296 bit
Memory IC Type SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE
memory width 64 64 64
Number of terminals 144 144 144
word count 67108864 words 67108864 words 67108864 words
character code 64000000 64000000 64000000
Maximum operating temperature 70 °C 70 °C 70 °C
organize 64MX64 64MX64 64MX64
Package body material UNSPECIFIED PLASTIC/EPOXY UNSPECIFIED
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
Certification status Not Qualified Not Qualified Not Qualified
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V
surface mount NO NO NO
technology CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form NO LEAD NO LEAD NO LEAD
Terminal location DUAL DUAL DUAL
Parts packaging code MODULE - MODULE
Contacts 144 - 144
ECCN code EAR99 - EAR99
access mode DUAL BANK PAGE BURST - DUAL BANK PAGE BURST
Other features AUTO/SELF REFRESH - AUTO/SELF REFRESH
Number of functions 1 - 1
Number of ports 1 - 1
Operating mode SYNCHRONOUS - SYNCHRONOUS
self refresh YES - YES
Maximum supply voltage (Vsup) 3.6 V - 3.6 V
Minimum supply voltage (Vsup) 3 V - 3 V
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