Ordering number : ENA1453A
LC87F1JJ2A
CMOS IC
FROM 192K byte, RAM 16384 byte on-chip
8-bit 1-chip Microcontroller
with USB-host controller
Overview
http://onsemi.com
The LC87F1JJ2A is an 8-bit microcomputer that, integrates on a single chip a number of hardware features such as
192K-byte flash ROM, 16384-byte RAM, an on-chip debugger, a 16-bit timer/counter, a 16-bit timer, four 8-bit
timers, a base timer serving as a realtime clock, 3 channels of synchronous SIO interface with automatic data transfer
capabilities, an asynchronous/synchronous SIO interface, a UART interface, a full-speed USB interface (host control
function), a 12-channel AD converter, 2 channels of 12-bit PWM, a system clock frequency divider, an infrared
remote control receiver circuit, and an interrupt feature.
Features
Flash
ROM
•
196608
×
8 bits
•
Capable of on-board programming
with a wide range of supply voltages: 3.0 to 5.5V
•
Block-erasable in 128 byte units
•
Writes data in 2-byte units
RAM
•
16384
×
9 bits
Package
Form
•
SQFP48(7×7): Lead-/Halogen-free type
Package Dimensions
unit : mm (typ)
3163B
9.0
7.0
36
37
25
24
48
1
0.5
(0.75)
12
0.18
13
7.0
9.0
0.15
1.7max
0.1
(1.5)
SANYO : SQFP48(7X7)
* This product is licensed from Silicon Storage Technology, Inc. (USA).
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.02
D2612HK/52009HKIM 20090407-S00002 No.A1453-1/27
0.5
LC87F1JJ2A
Bus
Cycle Time
•
83.3ns (When CF=12MHz)
Note: The bus cycle time here refers to the ROM read speed.
Minimum
Instruction Cycle Time (tCYC)
•
250ns (When CF=12MHz)
Ports
•
I/O ports
Ports whose I/O direction can be designated in 1-bit units 28 (P10 to P17, P20 to P27, P30 to P34,
P70 to P73, PWM0, PWM1, XT2)
Ports whose I/O direction can be designated in 4-bit units 8 (P00 to P07)
•
USB ports
2 (UHD+, UHD-)
•
Dedicated oscillator ports
2 (CF1, CF2)
•
Input-only port (also used for oscillation)
1 (XT1)
•
Reset pin
1 (RES)
•
Power supply pins
6 (VSS1 to VSS3, VDD1 to VDD3)
Timers
•
Timer 0: 16-bit timer/counter with 2 capture registers.
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
+ 8-bit counter (with two 8-bit capture registers)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with two 16-bit capture registers)
Mode 3: 16-bit counter (with two 16-bit capture registers)
•
Timer 1: 16-bit timer/counter that supports PWM/toggle outputs
Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs) + 8-bit timer/
counter with an 8-bit prescaler (with toggle outputs)
Mode 1: 8-bit PWM with an 8-bit prescaler
×
2 channels
Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs)
(toggle outputs also possible from lower-order 8 bits)
Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs)
(lower-order 8 bits may be used as PWM outputs)
•
Timer 4: 8-bit timer with a 6-bit prescaler
•
Timer 5: 8-bit timer with a 6-bit prescaler
•
Timer 6: 8-bit timer with a 6-bit prescaler (with toggle outputs)
•
Timer 7: 8-bit timer with a 6-bit prescaler (with toggle outputs)
•
Base timer
1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock, and timer 0 prescaler
output.
2) Interrupts programmable in 5 different time schemes
SIO
•
SIO0: Synchronous serial interface
1) LSB first/MSB first mode selectable
2) Transfer clock cycle: 4/3 to 512/3 tCYC
3) Automatic continuous data transmission (1 to 256 bits, specifiable in 1-bit units)
(Suspension and resumption of data transmission possible in 1 byte units)
•
SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
•
SIO4: Synchronous serial interface
1) LSB first/MSB first mode selectable
2) Transfer clock cycle: 4/3 to 1020/3 tCYC
3) Automatic continuous data transmission (1 to 8192 bytes, specifiable in 1 byte units)
(Suspension and resumption of data transmission possible in 1 byte units or in word units)
4) Auto-start-on-falling-edge function
5) Clock polarity selectable
6) CRC16 calculator circuit built in
No.A1453-2/27
LC87F1JJ2A
•
SIO9: Synchronous serial interface
1) LSB first/MSB first mode selectable
2) Transfer clock cycle: 4/3 to 1020/3 tCYC
3) Automatic continuous data transmission (1 to 8192 bytes, specifiable in 1 byte units)
(Suspension and resumption of data transmission possible in 1 byte units or word units)
4) Auto-start-on-falling-edge function
5) Clock polarity selectable
6) CRC16 calculator circuit built in
Full
Duplex UART
1) Data length: 7/8/9 bits selectable
2) Stop bits: 1 bit (2 bits in continuous transmission mode)
3) Baud rate: 16/3 to 8192/3 tCYC
AD
Converter: 8 bits
×
12 channels
PWM:
Multifrequency 12-bit PWM
×
2 channels
Infrared
Remote Control Receiver Circuit
1) Noise rejection function (noise filter time constant: Approx. 120μs when the 32.768kHz crystal oscillator is
selected as the base clock)
2) Supports data encoding systems such as PPM (Pulse Position Modulation) and Manchester encoding.
3) X'tal HOLD mode release function
USB
Interface (host control function)
1) Compliant with full-speed (12M bps) specifications
2) Supports 4 transfer types (control transfer, bulk transfer, interrupt transfer, and isochronous transfer).
Audio
Interface
1) Sampling frequency (fs):
8kHz/11.025kHz/12kHz/16kHz/22.05kHz/24kHz/32kHz/44.1kHz/48kHz
2) Master clock frequency:
256fs/384fs
3) Bit clock selectable:
48fs/64fs
4) Data bit length:
16/18/20/24 bits
5) LSB first/MSB first mode selectable
6) Left-justification/right-justification/I2S format selectable
Watchdog
Timer
•
Watchdog timer using external RC circuitry
•
Interrupt and reset signals selectable
Clock
Output Function
1) Can output a clock with a clock rate of 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, or 1/64 of the source oscillator clock selected
as the system clock.
2) Can output the source oscillation clock for the subclock.
No.A1453-3/27
LC87F1JJ2A
Interrupts
•
41 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2/T0L/INT4/UHC bus active/remote control signal receive
INT3/INT5/base timer
T0H/INT6/UHC device attach/UHC device detach/UHC resume
T1L/T1H/INT7/SIO9/AIF start
SIO0/UART1 receive
SIO1/SIO4/UART1 transmit/AIF end
ADC/T6/T7/UHC-ACK/UHC-NAK/UHC error/UHC-STALL
Port 0/PWM0/PWM1/T4/T5/UHC-SOF/DMCOPY/AIF error
Interrupt Source
•
Priority levels X > H > L
•
Of interrupts of the same level, the one with the smallest vector address takes precedence.
Subroutine
Stack Levels: 8192 levels maximum (The stack is allocated in RAM.)
High-speed
Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
Oscillation
and PLL Circuits
•
RC oscillation circuit (internal):
•
CF oscillation circuit:
•
Crystal oscillation circuit:
•
PLL circuit (internal):
For system clock
For system clock
For system clock, and realtime clock
For USB interface (see Fig.5) and audio interface (see Fig. 6)
No.A1453-4/27
LC87F1JJ2A
Standby
Function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) There are three ways of releasing the HALT mode.
(1) Setting the reset pin to the lower level.
(2) System resetting by watchdog timer
(3) Generating an interrupt
•
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The PLL base clock generator, CF, RC and crystal oscillators automatically stop operation.
2) There are five ways of releasing the HOLD mode.
(1) Setting the reset pin to the lower level
(2) System resetting by watchdog timer
(3) Having an interrupt source established at one of the INT0, INT1, INT2, INT4, and INT5 pins
* The INT0 and INT1 pins must be configured only for level detection.
(4) Having an interrupt source established at port 0
(5) Having an bus active interrupt source established in the USB host control circuit
•
X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
1) The PLL base clock generator, CF and RC oscillator automatically stop operation.
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are seven ways of releasing the X'tal HOLD mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer
(3) Having an interrupt source established at one of the INT0, INT1, INT2, INT4, and INT5 pins
* The INT0 and INT1 pins must be configured only for level detection.
(4) Having an interrupt source established at port 0
(5) Having an interrupt source established in the base timer circuit
(6) Having an bus active interrupt source established in the USB host control circuit
(7) Having an interrupt source established in the infrared remote controller receiver circuit
Development
Tools
•
On-chip debugger: TCB87- type B + LC87F1JJ2A
Flash
ROM Programming Boards
Package
SQFP48(7×7)
Programming board
W87F55256SQ
Flash ROM Programmer
Maker
Flash Support Group, Inc.
(FSG)
Flash Support Group, Inc.
(FSG)
+
Our company(Note 1)
Single/ganged
Our company
Onboard
single/ganged
Onboard
single/ganged
Single
Model
AF9708/
AF9709/AF9709B/AF9709C
(including Ando Electric Co., Ltd. models)
AF9101/AF9103(main unit)
(FSG)
SIB87(interface driver)
(Our company model)
SKK/SKK Type B
(SANYO FWS)
SKK-DBG Type B
(SANYO FWS)
Application version:
1.04 or later
Chip data version:
2.17 or later
LC87F1JJ2
(Note 2)
LC87F1JJ2A
Rev. 03.12 or later
LC87F1JJ2A
Supported Version
Device
Note 1: PC-less standalone onboard programming is possible using the FSG onboard programmer (AF9101/AF9103)
and the serial interface driver (SIB87) provided by Our company in pair.
Note 2: Dedicated programming device and program are required depending on the programming conditions. Contact
Our company or FSG if you have any questions or difficulties regarding this matter.
No.A1453-5/27
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