EEWORLDEEWORLDEEWORLD

Part Number

Search

EUBB10-FREQ1-LTR

Description
QUARTZ CRYSTAL RESONATOR, 24MHz - 29.999MHz, ROHS COMPLIANT PACKAGE-2
CategoryPassive components    Crystal/resonator   
File Size109KB,2 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance  
Download Datasheet Parametric View All

EUBB10-FREQ1-LTR Overview

QUARTZ CRYSTAL RESONATOR, 24MHz - 29.999MHz, ROHS COMPLIANT PACKAGE-2

EUBB10-FREQ1-LTR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerECLIPTEK
package instructionROHS COMPLIANT PACKAGE-2
Reach Compliance Codecompliant
Other featuresAT CUT CRYSTAL; TAPE AND REEL
Ageing5 PPM/YEAR
Crystal/Resonator TypePARALLEL - 3RD OVERTONE
Drive level2000 µW
frequency stability0.01%
frequency tolerance50 ppm
JESD-609 codee3
load capacitance10 pF
Manufacturer's serial numberEU
Installation featuresTHROUGH HOLE MOUNT
Maximum operating frequency29.999 MHz
Minimum operating frequency24 MHz
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
physical sizeL11.18XB4.7XH13.58 (mm)/L0.44XB0.185XH0.535 (inch)
Series resistance60 Ω
surface mountNO
Terminal surfaceMatte Tin (Sn) - with Nickel (Ni) barrier
EU
Series
• RoHS Compliant (Pb-Free)
• HC-49/U package
• AT cut
• Resistance weld seal
• Tight tolerance/stability
• Tape and reel, vinyl sleeve, insulator tab,
third lead, and custom lead length options
available
NOTES
EU
H 13.58
L 11.18
W 4.70
CRYSTAL
_____________________________________________________________________________________________________________________________________________________________________________________________
_____________________________________________________________________________________________________________________________________________________________________________________________
_____________________________________________________________________________________________________________________________________________________________________________________________
_____________________________________________________________________________________________________________________________________________________________________________________________
_____________________________________________________________________________________________________________________________________________________________________________________________
_____________________________________________________________________________________________________________________________________________________________________________________________
_____________________________________________________________________________________________________________________________________________________________________________________________
_____________________________________________________________________________________________________________________________________________________________________________________________
ELECTRICAL SPECIFICATIONS
Frequency Range
Frequency Tolerance / Stability
Over Operating Temperature Range
Operating Temperature Range
Aging (at 25°C)
Storage Temperature Range
Shunt Capacitance
Insulation Resistance
Drive Level
Load Capacitance (C
L
)
Frequency Range
1.8432MHz to 1.999MHz
2.000MHz to 2.399MHz
2.400MHz to 2.999MHz
3.000MHz to 3.199MHz
3.200MHz to 3.499MHz
3.500MHz to 3.599MHz
3.600MHz to 3.899MHz
3.900MHz to 3.999MHz
4.000MHz to 4.099MHz
MANUFACTURER
1.8432MHz to 65.000MHz
±50ppm / ±100ppm (Standard), ±30ppm / ±50ppm,
±15ppm / ±30ppm, *±15ppm / ±20ppm, or ±10ppm / ±15ppm
0°C to 70°C, -20°C to 70°C, or -40°C to 85°C
±5ppm / year Maximum
-40°C to 125°C
7pF Maximum
500 Megaohms Minimum at 100V
DC
2 mWatts Maximum
18pF (Standard), Custom C
L
10pF, or Series Resonant
EQUIVALENT SERIES RESISTANCE (ESR), MODE OF OPERATION (MODE), AND CUT
ESR (Ω)
650 Max
550 Max
350 Max
250 Max
200 Max
180 Max
150 Max
120 Max
100 Max
CATEGORY
Mode / Cut
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
SERIES
Frequency Range
4.100MHz to 4.999MHz
5.000MHz to 5.999MHz
6.000MHz to 6.999MHz
7.000MHz to 7.999MHz
8.000MHz to 9.999MHz
10.000MHz to 12.999MHz
13.000MHz to 32.768MHz
24.000MHz to 29.999MHz
30.000MHz to 65.000MHz
PACKAGE
ESR (Ω)
80 Max
75 Max
50 Max
40 Max
35 Max
30 Max
25 Max
60 Max
40 Max
CLASS
Mode / Cut
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Fundamental / AT
Third Overtone / AT
Third Overtone / AT
REV
.
DATE
ECLIPTEK CORP.
CRYSTAL
EU
HC-49/U
CR40
11/07
800-ECLIPTEK www.ecliptek.com for latest revision
Specifications subject to change without notice.
GPIO block diagram of C6000 series DSP
First, take a look at the GPIO block diagram:By looking at the GPIO block diagram, we can get a lot of information: The DIR register controls whether the GPIO pin is input or output, where the corresp...
火辣西米秀 DSP and ARM Processors
[New version of Zhongke Bluexun AB32VG1 RISC-V development board] - 0: Unboxing post - At this point it surpasses "UNO"
[i=s]This post was last edited by MianQi on 2021-8-6 12:57[/i]Just received the board:The pinout is obviously compatible with the Arduino UNO:At first I thought the location of the screw hole was inco...
MianQi Domestic Chip Exchange
ADCPro and DXP FAQ
What is ADCPro? Precision Data Converters Wiki What is ADCPro?ADCPro is a LabVIEW-based tool that works with a variety of ADSxxxx devices, allowing you to evaluate the performance of data converters w...
qwqwqw2088 Analogue and Mixed Signal
Prize-winning survey | Keysight Technologies’ entry-level R&D oscilloscope EXR is now online with a surprise!
Before introducing the newly released entry-level RD oscilloscope EXR from Keysight Technologies, Please allow me to introduce how to participate in this prize-winning survey~ [bowing]!Scan the QR cod...
EEWORLD社区 Test/Measurement
Help, how to connect FPGA-to-SDRAM to qsys, and how to read and write data to FPGA.
First, let me talk about my ideas. If I say something wrong, I hope you can help correct it: 1. Reserve a space in the DDR of the hps end, specifically set uboot bootargs mem=512M. 2. Then the fpga re...
tc317891209 FPGA/CPLD
Regarding the problem of sources.cmn and sources, please help me, thank you!
Hello everyone, may I ask: 1. What is the difference between sources.cmn and sources? 2. What do these environment variables in sources.cmn represent? ? ? I hope everyone can give a comment! ! ! ! ! T...
xiaoyevinne Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 16  1316  564  750  2150  1  27  12  16  44 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号