notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
12/21/09
1
IS41LV44052B
FUNCTIONAL BLOCK DIAGRAM
OE
WE
CAS
CONTROL
LOGIC
WE
CONTROL
LOGICS
OE
CONTROL
LOGIC
OE
CAS
CAS
WE
RAS
RAS
CLOCK
GENERATOR
DATA I/O BUS
COLUMN DECODERS
SENSE AMPLIFIERS
REFRESH
COUNTER
DATA I/O BUFFERS
ROW DECODER
RAS
I/O0-I/O3
MEMORY ARRAY
4,194,304 x 4
A0-A10(A11)
ADDRESS
BUFFERS
TRUTH TABLE
Function
Standby
Read
Write: Word (Early Write)
Read-Write
Hidden Refresh Read
Write
(1)
RAS-Only Refresh
CBR Refresh
Note:
1. EARLY WRITE only.
RAS
H
L
L
L
L→H→L
L→H→L
H→L
H→L
CAS
H
L
L
L
L
L
H
L
WE
X
H
L
H→L
H
L
X
X
OE
X
L
X
L→H
L
X
X
X
Address t
R
/t
C
X
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/NA
X
I/O
High-Z
D
out
D
in
D
out
, D
in
D
out
D
out
High-Z
High-Z
2
Integrated Silicon Solution, Inc.
Rev. C
12/21/09
IS41LV44052B
Functional Description
The IS41LV44052B is a CMOS DRAM optimized
for high-
speed
bandwidth, low power applications. During READ
or WRITE cycles, each bit is uniquely addressed through
the 11 address bits. These are entered 11 bits (A0-A10)
at a time for the 2K refresh device. The row address is
latched by the Row Address Strobe (RAS). The column
address is latched by the Column Address Strobe (CAS).
RAS
is used to latch the first nine bits and
CAS
is used
the latter ten bits.
Auto Refresh Cycle
To retain data, 2,048 refresh cycles are required in each
32 ms period. There are two ways to refresh the mem-
ory:
1. By clocking each of the 2,048 row addresses (A0 through
A10) with RAS at least once every 32 ms. Any read,
write, read-modify-write or RAS-only cycle refreshes
the addressed row.
2. Using a
CAS-before-RAS
refresh cycle.
CAS-before-RAS
refresh is activated by the falling edge of
RAS,
while
holding
CAS LOW. In CAS-before-RAS
refresh cycle,
an internal 9-bit counter provides the row addresses
and the external address inputs are ignored.
CAS-before-RAS
is a refresh-only mode and no data
access or device selection is allowed. Thus, the output
remains in the High-Z state during the cycle.
Memory Cycle
A memory cycle is initiated by bring
RAS LOW and it is
terminated by returning both
RAS
and
CAS
HIGH. To
ensures proper device operation and data integrity any
memory cycle, once initiated, must not be ended or aborted
before the minimum t
ras
time has expired. A new cycle
must not be initiated until the minimum precharge time
t
rp
, t
cp
has elapsed.
Power-On
After application of the V
cc
supply, an initial pause of
200 µs is required followed by a minimum of eight ini-
tialization cycles (any combination of cycles containing a
RAS signal).
During power-on, it is recommended that RAS
track with
V
cc
or be held at a valid V
ih
to avoid current surges.
Read Cycle
A read cycle is initiated by the falling edge of
CAS
or
OE,
whichever occurs last, while holding
WE HIGH.
The column
address must be held for a minimum time specified by t
ar
.
Data Out becomes valid only when t
rac
, t
aa
, t
cac
and t
oea
are all satisfied. As a result, the access time is dependent
on the timing relationships between these parameters.
Write Cycle
A write cycle is initiated by the falling edge of
CAS
and
WE, whichever occurs last. The input data must be valid
at or before the falling edge of
CAS
or
WE,
whichever
occurs last.
Integrated Silicon Solution, Inc.
Rev. C
12/21/09
3
IS41LV44052B
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
t
V
cc
I
out
P
d
T
a
T
stg
Parameters
Voltage on Any Pin Relative to GND
Supply Voltage
Output Current
Power Dissipation
Commercial Operation Temperature
Industrial Operation Temperature
Storage Temperature
3.3V
3.3V
Rating
–0.5 to +4.6
–0.5 to +4.6
50
1
0 to +70
-40 to +85
–55 to +125
Unit
V
V
mA
W
°C
°C
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indi-
cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect reliability.
RECOMMENDED OPERATING CONDITIONS
(Voltages are referenced to GND.)
Symbol
V
cc
V
ih
V
il
T
a
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Commercial Ambient Temperature
Industrial Ambient Temperature
3.3V
3.3V
3.3V
Min.
3.0
2.0
–0.3
0
-40
Typ.
3.3
—
—
—
—
Max.
3.6
V
cc
+ 0.3
0.8
70
85
Unit
V
V
V
°C
°C
CAPACITANCE
(1,2)
Symbol
C
in
1
C
in
2
C
io
Parameter
Input Capacitance: A0-A10
Input Capacitance: RAS,
CAS, WE, OE
Data Input/Output Capacitance: I/O0-I/O3
Max.
5
7
7
Unit
pF
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
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