IDT71V67603S150PFGI8 datasheet, PDF

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IDT71V67603S150PFGI8: DescriptionCache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, GREEN, PLASTIC, TQFP-100; Categorystorage storage; File Size420KB，23 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT71V67603S150PFGI8 Overview

Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, GREEN, PLASTIC, TQFP-100

IDT71V67603S150PFGI8 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	LQFP,
Contacts	100
Reach Compliance Code	compliant
ECCN code	3A991.B.2.A
Maximum access time	3.8 ns
Other features	PIPELINED ARCHITECTURE
JESD-30 code	R-PQFP-G100
JESD-609 code	e3
length	20 mm
memory density	9437184 bit
Memory IC Type	CACHE SRAM
memory width	36
Humidity sensitivity level	3
Number of functions	1
Number of terminals	100
word count	262144 words
character code	256000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX36
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	14 mm

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256K X 36, 512K X 18

IDT71V67603/Z

3.3V Synchronous SRAMs

IDT71V67803/Z

3.3V I/O, Burst Counter

Pipelined Outputs, Single Cycle Deselect

◆

Features

256K x 36, 512K x 18 memory configurations

Supports high system speed:

– 166MHz 3.5ns clock access time

– 150MHz 3.8ns clock access time

– 133MHz 4.2ns clock access time

LBO

input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte

write enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

3.3V I/O supply (V

DDQ

)

Packaged in a JEDEC Standard 100-pin thin plastic quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch

ball grid array (fBGA).

◆

Description

The IDT71V67603/7803 are high-speed SRAMs organized as

256K x 36/512K x 18. The IDT71V67603/7803 SRAMs contain write,

data, address and control registers. Internal logic allows the SRAM to

generate a self-timed write based upon a decision which can be left until

the end of the write cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the IDT71V67603/7803 can provide four cycles of

data for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will be pipelined for one

cycle before it is available on the next rising clock edge. If burst mode

operation is selected (ADV=LOW), the subsequent three cycles of output

data will be available to the user on the next three rising clock edges. The

order of these three addresses are defined by the internal burst counter

and the

LBO

input pin.

The IDT71V67603/7803 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm 100-

pin thin plastic quad flatpack (TQFP), a 119 ball grid array (BGA) and a 165

fine pitch ball grid array (fBGA).

Pin Description Summary

-A

BWE

(1)

CLK

ADV

ADSC

ADSP

LBO

I/O

-I/O

, I/O

-I/O

, V

DDQ

Address Inputs

Chip Enable

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Sleep Mode

Data Input / Output

Core Power, I/O Power

Ground

Input

I/O

Supply

Synchronous

Asynchronous

Synchronous

N/A

Synchronous

Asynchronous

Synchronous

N/A

5310 tbl 01

NOTE:

and

are not applicable for the IDT71V67802.

FEBRUARY 2009

DSC-5310/07

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Description	Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, GREEN, PLASTIC, TQFP-100	Cache SRAM, 512KX18, 3.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 512KX18, 3.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 256KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, GREEN, PLASTIC, TQFP-100	Cache SRAM, 256KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 512KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 512KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Is it Rohs certified?	conform to	conform to	incompatible	incompatible	conform to	incompatible	conform to	incompatible	conform to	conform to
Parts packaging code	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP
package instruction	LQFP,	LQFP, QFP100,.63X.87	14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	LQFP,	LQFP,	LQFP, QFP100,.63X.87	14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87
Contacts	100	100	100	100	100	100	100	100	100	100
Reach Compliance Code	compliant	compliant	not_compliant	not_compliant	compliant	compliant	compliant	not_compliant	compliant	compliant
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	3.8 ns	3.5 ns	3.5 ns	3.8 ns	3.5 ns	3.5 ns	3.8 ns	3.8 ns	3.8 ns	3.8 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
JESD-30 code	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100
JESD-609 code	e3	e3	e0	e0	e3	e0	e3	e0	e3	e3
length	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm
memory density	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit
Memory IC Type	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM
memory width	36	18	18	36	36	36	18	36	36	18
Humidity sensitivity level	3	3	3	3	3	3	3	3	3	3
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of terminals	100	100	100	100	100	100	100	100	100	100
word count	262144 words	524288 words	524288 words	262144 words	262144 words	262144 words	524288 words	262144 words	262144 words	524288 words
character code	256000	512000	512000	256000	256000	256000	512000	256000	256000	512000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	70 °C	70 °C	85 °C	70 °C	70 °C	85 °C	70 °C	70 °C	70 °C
organize	256KX36	512KX18	512KX18	256KX36	256KX36	256KX36	512KX18	256KX36	256KX36	512KX18
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	260	260	240	240	260	240	260	240	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	MATTE TIN	Matte Tin (Sn) - annealed	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	MATTE TIN	TIN LEAD	Matte Tin (Sn) - annealed	Tin/Lead (Sn85Pb15)	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	30	30	20	20	30	20	30	20	30	30
width	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm
Is it lead-free?	Lead free	Lead free	-	-	Lead free	-	Lead free	-	Lead free	Lead free
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Maximum clock frequency (fCLK)	-	166 MHz	166 MHz	150 MHz	-	-	150 MHz	150 MHz	150 MHz	150 MHz
I/O type	-	COMMON	COMMON	COMMON	-	-	COMMON	COMMON	COMMON	COMMON
Output characteristics	-	3-STATE	3-STATE	3-STATE	-	-	3-STATE	3-STATE	3-STATE	3-STATE
Encapsulate equivalent code	-	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	-	-	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87
power supply	-	3.3 V	3.3 V	3.3 V	-	-	3.3 V	3.3 V	3.3 V	3.3 V
Maximum standby current	-	0.05 A	0.05 A	0.07 A	-	-	0.07 A	0.05 A	0.05 A	0.05 A
Minimum standby current	-	3.14 V	3.14 V	3.14 V	-	-	3.14 V	3.14 V	3.14 V	3.14 V
Maximum slew rate	-	0.34 mA	0.34 mA	0.325 mA	-	-	0.325 mA	0.305 mA	0.305 mA	0.305 mA
Base Number Matches	-	1	1	1	1	1	1	1	-	-

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