Tentative
DSKTJ08
Silicon N-channel junction FET
For AF impedance converter
Marking Symbol : CT, CU
Package Code : TSSSMini3-F2-B
Absolute Maximum Ratings Ta = 25 °C
Parameter
Drain-source voltage(Gate open)
Drain-gate voltage(Source open)
Drain-source current(Gate open)
Drain-gate current(Source open)
power dissipation
Operating ambient temperature
Storage temperature
DSKTJ08
Total pages
page
Symbol
VDSO
VDGO
IDSO
IDGO
PD
Topr
Tstg
Rating
20
20
2
2
100
-20 to +80
-55 to +150
Unit
V
V
mA
mA
mW
°C
°C
Pin name
1.
Drain
2.
Source
3.
Gate
Electrical Characteristics Ta = 25 °C±3 °C
Drain current
*1,*4
Parameter
*4
Symbol
ID
Conditions
Min
180
190
Typ
Max
470
460
Unit
μA
μA
μS
Drain-source current
Mutual conductance
Noise voltage
*2
Voltage gain
Voltage gain difference
Voltage gain difference
*3
VDD = 2.0 V, Rd = 2.2 kΩ ± 1%
VDD = 2.0 V, Rd = 2.2 kΩ ± 1%,
IDSS
VGS = 0
gm
VDS = 2.0 V, VGS = 0, f = 1 kHz
VDD = 2.0 V, Rd = 2.2 kΩ ± 1%
NV
Co = 5 pF, A-curve
VDD = 2.0 V, Rd = 2.2 kΩ ± 1%
GV1
Co = 5 pF, eG = 10 mV, f = 1 kHz
VDD = 1.5 V, Rd = 2.2 kΩ ± 1%
GV2
Co = 5 pF, eG = 10 mV, f = 1 kHz
VDD = 2.0 V, Rd = 2.2 kΩ ± 1%
Δ
| GV・f |
Co = 5 pF, eG = 10 mV
f = 1 kHz to 70 Hz
½GV1-GV2½
660 1 500
10
-5.0
-7.0
-1.0
-1.5
μV
dB
0
0
1.7
2.0
Note: 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring
methods for transistors.
2. A protection diode is built-in between gate and source of transistor. However if forward current
flows between gate and source transistor might be damaged. So please be careful not insert reverse.
3. *1 ID is assured for IDSS.
*2 NV is assured for design.
*3
Δ|GV
. f | is assured for AQL 0.065. (The measurement method is used by source-grounded circuit.)
*4 Rank classification
Code
T
U
Rank
T
ID
180 to 320
IDSS
190 to 310
Marking symbo
CT
U
280 to 470
290 to 460
CU
Packing
2010.05.31
Embossed type (Thermo-compression sealing) : 10 000 pcs / reel
2010.7.29
Prepared
Revised
Semiconductor Company，Panasonic Corporation
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semiconductors de
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