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NM24W02UFEM8

Description
EEPROM, 256X8, Serial, CMOS, PDSO8, PLASTIC, SOIC-8
Categorystorage    storage   
File Size97KB,13 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

NM24W02UFEM8 Overview

EEPROM, 256X8, Serial, CMOS, PDSO8, PLASTIC, SOIC-8

NM24W02UFEM8 Parametric

Parameter NameAttribute value
MakerFairchild
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)0.4 MHz
JESD-30 codeR-PDSO-G8
length4.9 mm
memory density2048 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count256 words
character code256
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256X8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Certification statusNot Qualified
Maximum seat height1.75 mm
Serial bus typeI2C
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width3.9 mm
Maximum write cycle time (tWC)10 ms
NM24C02U/NM24C03U – 2K-Bit Serial EEPROM 2-Wire Bus Interface
August 1999
NM24C02U/NM24C03U
2K-Bit Serial EEPROM
2-Wire Bus Interface
General Description
The NM24C02U/NM24C03U are 2K (2,048) bit serial interface
CMOS EEPROMs (Electrically Erasable Programmable Read-
Only Memory). These devices fully conform to the
Standard
I
2
C™
2-wire protocol which uses Clock (SCL) and Data I/O (SDA) pins
to synchronously clock data between the "master" (for example a
microprocessor) and the "slave" (the EEPROM device). In addi-
tion, the serial interface allows a minimal pin count packaging
designed to simplify PC board layout requirements and offers the
designer a variety of low voltage and low power options.
NM24C03U incorporates a hardware "Write Protect" feature, by
which, the upper half of the memory can be disabled against
programming by connecting the WP pin to V
CC
. This section of
memory then effectively becomes a ROM (Read-Only Memory)
and can no longer be programmed as long as WP pin is connected
to V
CC
.
Fairchild EEPROMs are designed and tested for applications requir-
ing high endurance, high reliability and low power consumption for a
continuously reliable non-volatile solution for all markets.
Functions
I
I
2
C™ compatible interface
I
2,048 bits organized as 256 x 8
I
Extended 2.7V – 5.5V operating voltage
I
100 KHz or 400 KHz operation
I
Self timed programming cycle (6ms typical)
I
"Programming complete" indicated by ACK polling
I
NM24C03U: Memory "Upper Block" Write Protect pin
Features
I
The I
2
C™ interface allows the smallest I/O pincount of any
EEPROM interface
I
16 byte page write mode to minimize total write time per byte
I
Typical 200µA active current (I
CCA
)
I
Typical 1µA standby current (I
SB
) for "L" devices and 0.1µA
standby current for "LZ" devices
I
Endurance: Up to 1,000,000 data changes
I
Data retention greater than 40 years
Block Diagram
VCC
VSS
WP
H.V. GENERATION
TIMING &CONTROL
START
STOP
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER &
COMPARATOR
E2PROM
ARRAY
SDA
SCL
XDEC
A2
A1
A0
WORD
ADDRESS
COUNTER
R/W
YDEC
CK
DIN
DATA REGISTER
DOUT
DS800007-1
I
2
C™ is a registered trademark of Philips Electronics N.V.
© 1998 Fairchild Semiconductor Corporation
NM24C02U/NM24C03U Rev. B.1
1
www.fairchildsemi.com
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