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DATA SHEET
PNP SILICON EPITAXIAL TRANSISTOR
2SB1572
PNP SILICON EPITAXIAL TRANSISTOR
FEATURES
•
Low V
CE(sat)
: V
CE(sat)1
≤ −0.4
V
•
Complementary to 2SD2403
PACKAGE DRAWING (Unit: mm)
4.5±0.1
1.6±0.2
1.5±0.1
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Collector to Base Voltage
V
CBO
−80
Collector to Emitter Voltage
V
CEO
−60
Emitter to Base Voltage
V
EBO
−6.0
Collector Current (DC)
I
C(DC)
−3.0
Note1
Collector Current (pulse)
I
C(pulse)
−5.0
Base Current (DC)
I
B(DC)
−0.2
Note1
Base Current (pulse)
I
B(pulse)
−0.4
Note2
Total Power Dissipation
P
T
2.0
Junction Temperature
T
j
150
Storage Temperature Range
T
stg
–55 to + 150
Notes 1.
PW
≤
10 ms, Duty Cycle
≤
50%
2
2.
When mounted on ceramic substrate of 16 cm x 0.7 mm
V
V
V
A
A
A
A
W
°C
°C
0.8 MIN.
E
0.42
±0.06
1.5
C
B
0.47
±0.06
3.0
0.42
±0.06
0.41
+0.03
–0.05
E: Emitter
C: Collector (Fin)
B: Base
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Collector Cut-off Current
Emitter Cut-off Current
DC Current Gain
Note
SYMBOL
I
CBO
I
EBO
h
FE1
h
FE2
TEST CONDITIONS
V
CB
=
−80
V, I
E
= 0
V
EB
=
−6.0
V, I
C
= 0
V
CE
=
−2.0
V, I
C
=
−0.1
A
V
CE
=
−2.0
V, I
C
=
−1.0
A
V
CE
=
−2.0
V, I
C
=
−0.1
A
I
C
=
−2.0
A, I
B
=
−0.1
A
I
C
=
−3.0
A, I
B
=
−0.15
A
I
C
=
−2.0
A, I
B
=
−0.1
A
V
CE
=
−10
V, I
E
= 0.3 A
V
CB
=
−10
V, I
E
= 0, f = 1.0 MHz
I
C
=
−1.0
A, V
CC
=
−10
V,
R
L
= 5.0
Ω,
I
B1
=
−I
B2
=
−0.1
A,
MIN.
TYP.
MAX.
−100
−100
UNIT
nA
nA
−
80
100
−0.63
200
−0.685
−0.2
−0.3
−0.89
160
45
155
510
35
400
−0.73
−0.4
−0.6
−1.2
−
V
V
V
V
MHz
pF
ns
ns
ns
Base to Emitter Voltage
Note
Note
Note
V
BE
V
CE(sat)1
V
CE(sat)2
V
BE(sat)
f
T
C
ob
t
on
t
stg
t
f
Collector Saturation Voltage
Collector Saturation Voltage
Base Saturation Voltage
Gain Bandwidth Product
Output Capacitance
Turn-on Time
Storage Time
Fall Time
Note
Note
Pulsed: PW
≤
350
µ
s, Duty Cycle
≤
2%
h
FE
CLASSFICATION
Marking
h
FE2
HX
100 to 200
HY
160 to 320
HZ
200 to 400
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D11204EJ3V0DS00 (3rd edition)
Date Published July 2001 NS CP(K)
Printed in Japan
4.0±0.25
2.5±0.1
©
2001
Analogue and Mixed Signal
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