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PCS3I624Z09BG-08-ST

Description
100MHz, OTHER CLOCK GENERATOR, PDSO16, 0.150 INCH, GREEN, SOIC-16
Categorylogic    logic   
File Size168KB,13 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
Download Datasheet Parametric View All

PCS3I624Z09BG-08-ST Overview

100MHz, OTHER CLOCK GENERATOR, PDSO16, 0.150 INCH, GREEN, SOIC-16

PCS3I624Z09BG-08-ST Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
package instructionSOIC-8
Reach Compliance Codecompliant
ECCN codeEAR99
seriesPCS3
Input adjustmentMUX
JESD-30 codeR-PDSO-G8
length4.9 mm
Load capacitance (CL)30 pF
Logic integrated circuit typePLL BASED CLOCK DRIVER
MaximumI(ol)0.008 A
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times4
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTUBE
Maximum supply current (ICC)40 mA
Prop。Delay @ Nom-Sup0.35 ns
Same Edge Skew-Max(tskwd)0.25 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width3.9 mm
minfmax100 MHz
PCS3P624Z05B,
PCS3P624Z05C,
PCS3P624Z09B,
PCS3P624Z09C
Product Preview
High Frequency
TIMING SAFEt Peak EMI
Reduction IC
Description
http://onsemi.com
PCS3P624Z05/09 is a versatile, 3.3 V Zero−delay buffer designed
to distribute high frequency Timing−Safe clocks with Peak EMI
reduction. PCS3P624Z05 is an eight−pin version, accepts one
reference input and drives out five low−skew Timing−Safe clocks.
PCS3P624Z09 accepts one reference input and drives out nine
low−skew Timing−Safe clocks.
PCS3P624Z05/09 has a DLY_CTRL for adjusting the Input−Output
clock delay, depending upon the value of capacitor connected at this
pin to GND.
PCS3P624Z05/09 operates from a 3.3 V supply and is available in
two different packages, as shown in the ordering information table,
over commercial and Industrial temperature range.
Application
TSSOP−8
T SUFFIX
CASE 948AL
SOIC−8
S SUFFIX
CASE 751BD
TSSOP−16
T SUFFIX
CASE 948AN
SOIC−16
S SUFFIX
CASE 751BG
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
PCS3P624Z05/09 is targeted for use in Displays and memory
interface systems.
Features
High Frequency Clock Distribution with Timing−Safe Peak EMI
Reduction
Input Frequency Range: 50 MHz
100 MHz
Multiple Low Skew Timing−Safe Outputs:
PCS3P624Z05: 5 Outputs
PCS3P624Z09: 9 Outputs
External Input−Output Delay Control Option
Supply Voltage: 3.3 V
±
0.3 V
Commercial and Industrial Temperature Range
Packaging Information:
ASM3P624Z05: 8 pin SOIC, and TSSOP
ASM3P624Z09: 16 pin SOIC, and TSSOP
True Drop−in Solution for Zero Delay Buffer, ASM5P2305A / 09A
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
©
Semiconductor Components Industries, LLC, 2011
August, 2011
Rev. P2
1
Publication Order Number:
PCS3P624Z05/D
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