ZXLD1615
ADJUSTABLE DC-DC BOOST CONVERTER WITH INTERNAL SWITCH IN
TSOT23-5
DESCRIPTION
The ZXLD1615 is a PFM inductive boost converter
designed to provide output voltages of up to 28V
from a 2.5V to 5.5V input supply.
The ZXLD1615 includes the output switch and peak
current sense resistor, and can provide up to 10mA
output current at maximum output voltage. Higher
current is available at lower output voltages.
Quiescent current is typically 60 A and a shutdown
function is provided to reduce this current to less
than 100nA in the 'off' state.
Nominal output voltage can be set up to a maximum
of 28V by two external resistors and can be adjusted
to lower values by a PWM control signal applied to
the 'Enable' pin. Depending upon the control
frequency, the PWM signal will provide either
continuous (low ripple) or gated control. The PWM
filter components are contained within the chip.
Minimum output voltage is determined by the input
supply.
The device is assembled in a low profile TSOT23-5
pin package.
ADVANCED FEATURES
•
Internal 30V NDMOS switch
•
True analog output voltage control via PWM
with internal filter
APPLICATIONS
•
LCD and OLED bias
•
Cellular / mobile phones
•
Digital cameras
•
PDAs
•
LCD modules
•
Varactor and PIN diode bias
•
Palmtop computers
FEATURES
•
Low profile TSOT23-5 pin package
•
Internal PWM filter for adjustable output
•
High efficiency (85% typ)
•
Wide input voltage range: 2.5V to 5.5V
•
Up to 250mA output current at 5V
•
Low quiescent current: (60 A typ)
•
100nA maximum shutdown current
•
Up to 1MHz switching frequency
•
Low external component count
TYPICAL APPLICATION CIRCUIT
PINOUT
TOP VIEW
ISSUE 3 - AUGUST 2004
1
SEMICONDUCTORS
ZXLD1615
ABSOLUTE MAXIMUM RATINGS
(Voltages to GND unless otherwise stated)
Input voltage (V
IN
)
7V
LX output voltage (V
LX
)
Switch output current (I
LX
)
Power dissipation (PD)
Operating temperature (T
OP
)
Storage temperature (T
ST
)
Junction temperature (Tj
MAX
)
30V
500mA
300mW
-40 to 85°C
-55 to 150°C
125°C
ELECTRICAL CHARACTERISTICS:
(Test conditions: V
IN
=V
EN
=3V, T
AMB
=25°C unless otherwise stated
(1)
)
Symbol
V
IN
I
IN
Parameter
Input voltage
Supply current
Quiescent
Shutdown
V
FB
f
LX
T
OFF
T
ON (2)
I
LXpk
R
LX
I
LX(leak)
V
ENH
V
ENL
I
ENL
I
ENH
FB pin control voltage
Operating frequency
LX output ‘OFF’ time
LX output ‘ON’ time
Switch peak current limit
Switch 'On' resistance
Switch leakage current
V
LX
=20V
1.5
L=10 H, V
OUT
=28V, 5mA load
320
1.75
1
V
IN
0.4
-100
1
120
20
100
µA
V
V
nA
A
µs
%
L=10 H, V
OUT
=28V, 5mA load
350
V
EN
= V
IN
, I
LX
= 0, Output not switching
V
EN
= 0V
0.98
600
500
5
60
<10
100
100
1.07
µA
nA
V
kHz
ns
µs
mA
Conditions
Min
2.5
Typ
Max
5.5
Units
V
EN pin high level Input voltage Device active
EN pin low level Input voltage
EN pin low level input current
Device in shutdown
V
EN
=0V
EN pin high level input current V
EN
=V
IN
V
EN
switched from high to low
10kHz < f < 100kHz, V
ENH
=V
IN
T
EN(hold)(3)
EN pin turn off delay
T/T
PWM duty cycle range at
‘EN’ input for dc output
voltage control
Internal PWM low pass filter
cut-off frequency
Filter attenuation
f
LPF
A
LPF
4
f=30kHz
52.5
kHz
dB
NOTES:
1 Production testing of the device is performed at 25°C. Functional operation of the device over a –40°C to +85°C temperature range is
guaranteed by design, characterization and process control.
2 Nominal ‘on’ time (TONnom ) is defined by the input voltage (V
IN
), coil inductance (L) and peak current (I
LXpkdc
) according to the expression:
T
ONnom
= {I
LX(pkdc)
x L/V
IN
} +200ns
3 This is the time for which the device remains active after the EN pin has been asserted low. This delay is necessary to allow the output to be
maintained during dc PWM mode operation.
4 The maximum PWM signal frequency during this mode of operation should be kept as low as possible to minimize errors due to the turn-off
delay
ISSUE 3 - AUGUST 2004
SEMICONDUCTORS
2
ZXLD1615
PIN DESCRIPTION
Pin No.
1
2
3
Name
LX
GND
FB
Description
Output of NDMOS switch
Ground (0V)
Feedback pin for voltage control loop
Nominal voltage 1.025V
4
EN
Enable input (active high to turn on device)
Also used to adjust output current by PWM signal.
Connect to V
in
for permanent operation.
5
V
IN
Input voltage (2.5V to 5.5V). Decouple with capacitor close to device.
BLOCK DIAGRAM
ISSUE 3 - AUGUST 2004
3
SEMICONDUCTORS
ZXLD1615
Device Description
The device is a PFM flyback dc-dc boost converter,
working in discontinuous mode.
With reference to the chip block diagram and typical
application circuit, the operation of the device is as
follows:
Control loop
When 'EN' is high, the control circuits become active
and the low side of the coil (L1) is switched to ground
via NDMOS transistor (MN). The current in L1 is
allowed to build up to an internally defined level
(nominally 320mA) before MN is turned off. The
energy stored in L1 is then transferred to the output
capacitor (C2) via schottky diode (D1). The output
voltage is sensed at pin 'FB' by external resistors R1
and R2 and compared to a reference voltage V
REF
(1.025V nominal). A comparator senses when the
output voltage is above that set by the reference and
its output is used to control the 'off' time of the
output switch. The control loop is self-oscillating,
producing pulses of up to 5 s maximum duration
(switch 'on'), at a frequency that varies in proportion
to the output current. The feedback loop maintains a
voltage of V
REF
at the FB pin and therefore defines a
maximum output voltage equal to V
REF
*(R1+R2)/R1.
The minimum 'off' time of the output switch is fixed
at 0.5 s nominal, to allow time for the coil's energy
to be dissipated before the switch is turned on again.
This maintains stable and efficient operation in
discontinuous mode.
Filtered PWM operation
The input of an internal low pass filter is switched to
V
REF
when the EN pin is high and switched to ground
when the EN pin is low. The output of this filter
drives the comparator within the control loop. A
continuous high state on EN therefore provides a
filtered voltage of value Vref to the comparator.
However, by varying the duty cycle of the EN signal
at a suitably high frequency (f>10kHz), the control
loop will see a voltage, that has an average value
equal to the duty cycle multiplied by V
REF
. This
provides a means of adjusting the output voltage to a
lower value. It also allows the device to be both
turned on and adjusted with a single signal at the
‘EN’ pin. The output during this mode of operation
will be a dc voltage equal to V
REF
*(R1+R2)/R1 x duty
cycle.
Gated PWM operation
The internal circuitry of the ZXLD1615 is turned off
when no signal is present on the 'EN' pin for more
than 120 s (nominal). A low frequency signal applied
to the EN pin will therefore gate the device 'on' and
'off' at the gating frequency and the duty cycle of this
signal can be varied to provide an average output
equal to V
REF
*(R1+R2)/R1 x duty cycle. For best
accuracy, the gating frequency should be made as
low as possible (e.g. below 1kHz), such that the turn
off delay of the chip is only a small proportion of the
gating period
Further details of setting output current are given in
the application notes.
ISSUE 3 - AUGUST 2004
SEMICONDUCTORS
4
ZXLD1615
TYPICAL CHARACTERISTICS
ISSUE 3 - AUGUST 2004
5
SEMICONDUCTORS
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