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EM6521 4 bit Microcontroller
Features
•
Low Power
- 11 µA active mode, LCD On
- 1.8 µA standby mode, LCD Off
- 0.1 µA sleep mode
@ 3 V, 32 KHz, 25 ºC
Large Voltage range, 2 to 5.5 V
2 clocks per instruction cycle
72 basic instructions
EEPROM 4096 x 16 bits
RAM 128 x 4 bits
Max. 12 inputs ; port A, port B, port SP
Max. 8 outputs ; port B, port SP
Voltage Level Detector, 8 levels software
selectable from 1.2 V up to 4.0 V
Melody, 7 tones + silence inclusive 4-bit timer
Universal 10-bit counter, PWM, event counter
Prescaler down to 1 second ( crystal = 32 KHz )
1/1000 sec 12 bit binary coded decimal counter
with hard or software start/stop function
LCD 20 Segments, 3 or 4 times multiplexed
3 wire serial port , 8 bit, master and slave mode
5 external interrupts (port A, serial interface)
8 internal interrupts (3x prescaler, BCD counter
2x10-bit counter, melody timer, serial interface)
timer watchdog and oscillation supervisor
Figure 2. Pin Configuration, TQFP52 10 * 10 * 1 mm
Figure 1. Architecture
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Description
The EM6521is an advanced single chip CMOS 4-bit
microcontroller. It contains EEPROM, RAM, LCD
driver, power on reset, watchdog timer, oscillation
detection circuit, 10-bit up/down and event counter,
1ms BCD counter, prescaler, voltage level detector
(Vld), serial interface and several clock functions.
The low voltage feature and low power
consumption make it the most suitable controller for
battery, stand alone and mobile equipment. The
EM6521 is manufactured using EM Marin's
Advanced Low Power (ALP) CMOS Process.
Typical
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Applications
Timing device
Automotive controls with display
Intelligent display driver
Measurement equipment
Domestic appliance
Interactive system with display
Timer / sports timing devices
Bicycle computers
Safety and security devices
© EM Microelectronic-Marin SA, 9/99, Rev. B/275
1
FOR ENGINEERING ONLY
EM6521 at a glance
• Power Supply
- Low voltage low power architecture
including internal voltage regulator
- 2.0 … 5.5 V battery voltage
- 11 µA in active mode (Xtal, LCD on, 25
°C)
- 1.8 µA in standby mode (Xtal, LCD off, 25
°C)
- 0.1 µA in sleep mode (25
°C)
- 32 KHz Oscillator
EM6521
• 4-Bit Input Port A
- Direct input read on the port terminals
- Debouncer function available on all inputs
- Interrupt request on positive or negative edge
- Pull resistor selectable by register
- Test variables (software) for conditional jumps
- PA[0] and PA[3] are inputs for the event counter
- PA[3] is Start/Stop input for the millisecond counter
- Reset with input combination
• RAM
- 64 x 4 bit, direct addressable
- 64 x 4 bit, indexed addressable
• 4-Bit Bi-directional Port B
- All different functions bit-wise selectable
- Direct input read on the port terminals
- Data output latches
- CMOS or Nch. open drain outputs
- Pull-down or pull-up selectable
- Selectable PWM, 32kHz, 1kHz and 1Hz output
• EEPROM
- 4096 x 16 bit, metal mask programmable
• CPU
- 4-bit RISC architecture
- 2 clock cycles per instruction
- 72 basic instructions
• Prescaler
- 15 stage system clock divider down to 1Hz
- 3 Interrupt requests; 1Hz, 32Hz or 8Hz, Blink
- Prescaler reset (4kHz to 1Hz)
• Main Operating Modes and Resets
- Active mode (CPU is running)
- Standby mode (CPU in halt)
- Sleep mode (no clock, reset state)
- Watchdog reset (logic and oscillation watchdogs)
- Reset terminal and POR
- Reset with input combination on port A (register
selectable)
• Voltage Level Detector (SVLD)
- 8 different levels from 1.2 V to 4.0 V (ROM Version)
- Busy flag during measure
• 10-Bit Universal Counter
- 10, 8, 6 or 4 bit up/down counting
- Parallel load
- Event counting (PA[0] or PA[3])
- 8 different input clocks
- Full 10 bit or limited (8, 6, 4 bit) compare function
- 2 interrupt requests (on compare and on 0)
- Hi-frequency input on PA[3] and PA[0]
- Pulse width modulation (PWM) output
• Liquid Crystal Display Driver (LCD)
- 20 Segments 3 or 4 times multiplexed
- Internal or external voltage multiplier
- Free Segment allocation architecture
- LCD switch off for power save
• 8-Bit Serial Interface
- 3 wire master/slave mode
- READY output during data transfer
- Maximum shift clock is equal to system clock
- Interrupt request to the CPU after 8 bits
- Supports different serial formats
- Can be configured as a parallel 4 bit I/O port
- Direct input read on the port terminals
- All outputs can be put tristate (default)
- Selectable pull resistors in input mode
- CMOS or Nch. open drain outputs
• Melody Generator
- Dedicated Buzzer terminal
- 7 tones plus silence output
- The output can be put tristate (default)
- Internal 4-bit timer, usable also in standalone mode
- 4 different timer input clocks
- Timer with automatic reload or single run
- Timer interrupt request when reaching 0
• Interrupt Controller
- 5 external and 8 internal interrupt request sources
- Each interrupt request can individually be masked
- Each interrupt flag can individually be reset
- Automatic reset of each interrupt request after read
- General interrupt request to CPU can be disabled
- Automatic enabling of general interrupt request flag
when going into HALT mode
• Millisecond Counter
- 3 digits binary coded decimal counter (12 bits)
- PA[3] input pulse width and period measurement
- Internal 1000 Hz clock generation
- Hardware or software controlled start stop mode
- Interrupt request on either 1/10 Sec or 1Sec
©
EM Microelectronic-Marin SA, 9/99, Rev. B/275
2
FOR ENGINEERING ONLY
Table of Contents
Features
Description
Typical
Applications
1
1
1
2
4
6
7
7
7
7
8
9
10
10
10
11
11
12
12
12
14
14
15
15
16
16
16
EM6521
36
36
38
38
38
39
39
41
42
43
44
44
45
45
46
47
48
48
49
49
51
55
56
57
57
57
58
59
59
60
60
8.6
8.7
9
Counter Setup
10-bit Counter Registers
EM6521 at a glance
1
2
Pin Description for EM6521
1.1
Programming Connections
Operating Modes
2.1
Active Mode
2.2
Standby Mode
2.3
Sleep Mode
Power Supply
Reset
4.1
Oscillation Detection Circuit
4.2
Reset Terminal
4.3
Input Port A Reset Function
4.4
Digital Watchdog Timer Reset
4.5
CPU State after Reset
Oscillator and Prescaler
5.1
Oscillator
5.2
Prescaler
Input and Output Ports
6.1
Ports Overview
6.2
Port A
6.2.1
6.2.2
6.2.3
6.2.4
IRQ on Port A
Pull-up or Pull-down
Software Test Variables
Port A for 10-Bit Counter and MSC
Millisecond Counter
9.1
PA[3] Input for MSC
9.2
IRQ from MSC
9.3
MSC-Modes
9.4
Mode selection
9.5
Millisecond Counter Registers
10 Interrupt Controller
10.1 Interrupt Control Registers
11 Supply Voltage Level Detector
11.1 SVLD Register
12 Strobe Output
12.1 Strobe Register
13
RAM
3
4
5
14 LCD Driver
14.1 LCD Control
14.2 LCD Addressing
14.3 Free Segment Allocation
14.4 LCD Registers
15
16
17
Peripheral Memory Map
Option Register Memory Map
Active Supply Current Test
6
18 Mask Options
18.1 Input / Output Ports
18.1.1
18.1.2
18.1.3
18.1.4
18.1.5
18.1.6
Port A Metal Options
Port B Metal Options
Port SP Metal Options
Voltage Regulator Option
Debouncer Frequency Option
User defined LCD Segment Allocation
6.3
6.4
6.4.1
6.4.2
6.4.3
6.4.4
Port A Registers
Port B
Input / Output Mode
Pull-up or Pull-down
CMOS / NCH. Open Drain Output
PWM and Frequency Output
16
18
18
19
19
20
6.5
6.6
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
6.6.6
6.6.7
Port B Registers
Port Serial
4-bit Parallel I/O
Pull-up or Pull-down
Nch. Open Drain Outputs
General Functional Description
Detailed Functional Description
Output Modes
Reset and Sleep on Port SP
20
21
21
22
23
23
24
24
25
19 Measured Electrical Behaviors
19.1 IDD Current
19.2 Regulator Voltage
19.3 Pull Resistors
19.4 Output currents
20 EM6521 Electrical Specification
20.1 Absolute Maximum Ratings
20.2 Handling Procedures
20.3 Standard Operating Conditions
20.4 DC Characteristics - Power Supply
20.5 Supply Voltage Level Detector
20.6 Oscillator
20.7 DC characteristics - I/O Pins
20.8 LCD SEG[20:1] Outputs
20.9 LCD Com[4:1] Outputs
20.10
DC Output Component
20.11
LCD Voltage Multiplier
21
22
Die, Pad Location and Size
TQF52 Package Dimensions
61
61
61
61
62
63
63
63
63
63
64
64
65
66
66
66
66
67
68
69
69
69
6.7
7
Serial Interface Registers
26
28
28
29
29
Melody, Buzzer
7.1
4-Bit Timer
7.1.1
7.1.2
Single Run Mode
Continuos Run Mode
7.2
7.3
8
Programming Order
Melody Registers
30
30
32
32
33
34
34
34
35
35
10-bit Counter
8.1
Full and Limited Bit Counting
8.2
Frequency Select and Up/Down Counting
8.3
Event Counting
8.4
Compare Function
8.5
Pulse Width Modulation (PWM)
8.5.1
8.5.2
How the PWM Generator works.
PWM Characteristics
23 Ordering Information
23.1 Packaged devices
23.2 DIE Form
© EM Microelectronic-Marin SA, 9/99, Rev. B/275
3
FOR ENGINEERING ONLY
1
Pin Description for EM6521
Chip
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
TQFP
52
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
DIL
64
10
11
12
13
14
15
16
18
19
20
21
22
23
26
27
28
29
30
31
33
34
35
36
37
38
39
42
43
44
Signal Name
VL1
VL2
VL3
COM[1]
COM[2]
COM[3]
COM[4]
SEG[20]
SEG[19]
SEG[18]
SEG[17]
SEG[16]
SEG[15]
SEG[14]
SEG[13]
SEG[12]
SEG[11]
SEG[10]
SEG[9]
SEG[8]
SEG[7]
SEG[6]
SEG[5]
SEG[4]
SEG[3]
SEG[2]
SEG[1]
Reset
Test
Function
Voltage multiplier level 1
Voltage multiplier level 2
Voltage multiplier level 3
LCD back plane 1
LCD back plane 2
LCD back plane 3
LCD back plane 4
LCD Segment 20
LCD Segment 19
LCD Segment 18
LCD Segment 17
LCD Segment 16
LCD Segment 15
LCD Segment 14
LCD Segment 13
LCD Segment 12
LCD Segment 11
LCD Segment 10
LCD Segment 9
LCD Segment 8
LCD Segment 7
LCD Segment 6
LCD Segment 5
LCD Segment 4
LCD Segment 3
LCD Segment 2
LCD Segment 1
Input reset terminal,
internal pull-down 15 KOhm
Input test terminal,
internal pull-down 15 KOhm
Input/output , open drain
serial port : SIN
parallel out terminal 0
Output , open drain
serial port : Ready/CS
parallel out terminal 1
Output , open drain
serial port : SOUT
parallel out terminal 2
Input/output , open drain
serial port : SCLK
parallel out terminal 3
Input/output, open drain
port B terminal 0
EM6521
Remarks
LCD level 1 input, if external
supply selected
LCD level 2 input, if external
supply selected
LCD level 3 input, if external
supply selected
Not used if 3 times multiplexed
Main reset
For EM tests only, ground 0 !
Except when needed for MFP
programming
Serial interface data in
or
parallel data[0] in/out
Serial interface Ready CS
or
parallel data[1] in/out
Serial interface data out
or
parallel data[2] in/out
Serial interface clock I/O
or
parallel data[3] in/out
Port B data[0] I/O or
Ck[1] output
30
30
45
PSP[0]
31
31
46
PSP[1]
32
32
47
PSP[2]
33
33
49
PSP[3]
34
34
50
PB[0]
©
EM Microelectronic-Marin SA, 9/99, Rev. B/275
4
FOR ENGINEERING ONLY
EM6521
Remarks
Port B data[1] I/O or
Ck[11] output
Port B data[2] I/O or
Ck[16] output
Port B data[3] I/O or
PWM output
TestVar 1
Event counter
TestVar 2
TestVar 3
Event counter,
MSC start/stop control
Chip
35
36
37
38
39
40
41
42
43
TQFP
52
35
36
37
38
39
40
41
42
43
DIL
64
51
52
53
54
55
58
59
60
61
Signal Name
PB[1]
PB[2]
PB[3]
PA[0]
PA[1]
PA[2]
PA[3]
Buzzer
Strobe
Function
Input/output, open drain
port B terminal 1
Input/output, open drain
port B terminal 2
Input/output, open drain
port B terminal 3
Input port A terminal 0
Input port A terminal 1
Input port A terminal 2
Input port A terminal 3
Output Buzzer terminal
Output Strobe terminal
µP reset state or/and port B write
or sleep flag out
44
44
62
Vbat = V
DD
Positive power supply
MFP Connection
45
45
63
Vreg
Internal voltage regulator
Connect to minimum 100nF,
MFP connection
46
46
64
Qin/Osc1
Crystal terminal 1
32 KHz crystal, MFP connection
47
47
2
Qout /Osc2
Crystal terminal 2
32 KHz crystal, MFP connection
48
48
3
V
SS
Negative power supply
ref. terminal, MFP connection
49
49
4
C2B
Voltage multiplier
Not needed if ext. supply
50
50
5
C2A
Voltage multiplier
Not needed if ext. supply
51
51
6
C1B
Voltage multiplier
Not needed if ext. supply
52
52
7
C1A
Voltage multiplier
Not needed if ext. supply
Gray shaded areas : Terminals needed for MFP programming connections (V
DD
, Vreg, Qin, Qout, Test). See
also Programming connections.
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than
circuitry entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA
reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged
to ensure that the information given has not been superseded by a more up-to-date version.
© EM Microelectronic-Marin SA, 9/99, Rev. B/275
5
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