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LTC2261-14

Description
16-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs
File Size3MB,28 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet View All

LTC2261-14 Overview

16-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs

FEATURES
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LTC2192
LTC2191/LTC2190
16-Bit, 65Msps/40Msps/
25Msps Low Power
Dual ADCs
DESCRIPTION
Electrical Specifications Subject to Change
2-Channel Simultaneous Sampling ADC
Serial LVDS Outputs: 1, 2 or 4 Bits per Channel
77dB SNR
90dB SFDR
Low Power: 198mW/146mW/104mW Total
99mW/73mW/52mW per Channel
Single 1.8V Supply
Selectable Input Ranges: 1V
P-P
to 2V
P-P
550MHz Full-Power Bandwidth S/H
Shutdown and Nap Modes
Serial SPI Port for Configuration
52-Pin (7mm
×
8mm) QFN Package
The LTC
®
2192/LTC2191/LTC2190 are 2-channel, simul-
taneous sampling 16-bit A/D converters designed for
digitizing high frequency, wide dynamic range signals. They
are perfect for demanding communications applications
with AC performance that includes 77dB SNR and 90dB
spurious free dynamic range (SFDR). Ultralow jitter of
0.07ps
RMS
allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 3.3LSB
RMS
.
To minimize the number of data lines the digital outputs
are serial LVDS. Each channel outputs one bit, two bits or
four bits at a time. The LVDS drivers have optional internal
termination and adjustable output levels to ensure clean
signal integrity.
The ENC
+
and ENC
inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL or CMOS
inputs. An internal clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIONS
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Communications
Cellular Base Stations
Software-Defined Radios
Portable Medical Imaging
Multi-Channel Data Acquisition
Nondestructive Testing
TYPICAL APPLICATION
2-Tone FFT, f
IN
= 70MHz and 69MHz
1.8V
V
DD
CH1
ANALOG
INPUT
CH2
ANALOG
INPUT
ENCODE
INPUT
S/H
16-BIT
ADC CORE
16-BIT
ADC CORE
1.8V
OV
DD
OUT1A
OUT1B
OUT1C
OUT1D
OUT2A
OUT2B
OUT2C
OUT2D
DATA CLOCK OUT
FRAME
0
–10
–20
–30
AMPLITUDE (dBFS)
–40
–50
–60
–70
–80
S/H
DATA
SERIALIZER
SERIALIZED
LVDS
OUTPUTS
PLL
–90
–100
–110
–120
GND
OGND
219210 TA01a
0
20
10
FREQUENCY (MHz)
30
219210
G07
219210p
1
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