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Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> TSB43AA22PDT
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TSB43AA22PDT

Description
2 CHANNEL(S), 400Mbps, SERIAL COMM CONTROLLER, PQFP128, PLASTIC, QFP-128
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size1MB，101 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Environmental Compliance  
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TSB43AA22PDT Overview

2 CHANNEL(S), 400Mbps, SERIAL COMM CONTROLLER, PQFP128, PLASTIC, QFP-128

TSB43AA22PDT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
MakerRochester Electronics
Parts packaging codeQFP
package instructionPLASTIC, QFP-128
Contacts128
Reach Compliance Codeunknown
Address bus width32
boundary scanNO
Bus compatibilityPCI
maximum clock frequency24.576 MHz
Maximum data transfer rate50 MBps
External data bus width32
JESD-30 codeS-PQFP-G128
length14 mm
low power modeYES
Humidity sensitivity level3
Number of serial I/Os2
Number of terminals128
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeTFQFP
Package shapeSQUARE
Package formFLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)235
Certification statusCOMMERCIAL
Maximum seat height1.2 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceNOT SPECIFIED
Terminal formGULL WING
Terminal pitch0.4 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
uPs/uCs/peripheral integrated circuit typeSERIAL IO/COMMUNICATION CONTROLLER, SERIAL

TSB43AA22PDT Preview

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TSB43AA22
Integrated 1394a 2000 OHCI PHY/Link Layer
Controller
Data Manual
2000
1394 Host Controller Solutions
SLLS358B
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright
©
2000, Texas Instruments Incorporated
Contents
Section
1
Title
Page
1–1
1–1
1–3
1–4
1–4
1–4
2–1
3–1
3–2
3–2
3–3
3–3
3–4
3–5
3–5
3–6
3–6
3–7
3–7
3–8
3–8
3–9
3–9
3–10
3–11
3–12
3–12
3–13
3–14
3–15
3–16
4–1
4–4
4–5
4–6
4–6
4–7
2
3
4
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3
Related Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Terminal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TSB43AA22 1394 OHCI Controller Programming Model . . . . . . . . . . . . . .
3.1
PCI Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
Vendor ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3
Device ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4
Command Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5
Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.6
Class Code and Revision ID Register . . . . . . . . . . . . . . . . . . . . . . . . . .
3.7
Latency Timer and Class Cache Line Size Register . . . . . . . . . . . . . .
3.8
Header Type and BIST Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.9
OHCI Base Address Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.10 TI Extension Base Address Register . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.11 Subsystem Identification Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.12 Power Management Capabilities Pointer Register . . . . . . . . . . . . . . .
3.13 Interrupt Line and Pin Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.14 MIN_GNT and MAX_LAT Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.15 OHCI Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.16 Capability ID and Next Item Pointer Registers . . . . . . . . . . . . . . . . . . .
3.17 Power Management Capabilities Register . . . . . . . . . . . . . . . . . . . . . .
3.18 Power Management Control and Status Register . . . . . . . . . . . . . . . .
3.19 Power Management Extension Registers . . . . . . . . . . . . . . . . . . . . . . .
3.20 Miscellaneous Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . .
3.21 Link Enhancement Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.22 Subsystem Access Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.23 GPIO Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OHCI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1
OHCI Version Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2
GUID ROM Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3
Asynchronous Transmit Retries Register . . . . . . . . . . . . . . . . . . . . . . .
4.4
CSR Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5
CSR Compare Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
iii
5
6
4.6
CSR Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.7
Configuration ROM Header Register . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8
Bus Identification Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.9
Bus Options Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.10 GUID High Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.11 GUID Low Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.12 Configuration ROM Mapping Register . . . . . . . . . . . . . . . . . . . . . . . . . .
4.13 Posted Write Address Low Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.14 Posted Write Address High Register . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.15 Vendor ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.16 Host Controller Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.17 Self-ID Buffer Pointer Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.18 Self-ID Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.19 Isochronous Receive Channel Mask High Register . . . . . . . . . . . . . .
4.20 Isochronous Receive Channel Mask Low Register . . . . . . . . . . . . . . .
4.21 Interrupt Event Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.22 Interrupt Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.23 Isochronous Transmit Interrupt Event Register . . . . . . . . . . . . . . . . . .
4.24 Isochronous Transmit Interrupt Mask Register . . . . . . . . . . . . . . . . . . .
4.25 Isochronous Receive Interrupt Event Register . . . . . . . . . . . . . . . . . . .
4.26 Isochronous Receive Interrupt Mask Register . . . . . . . . . . . . . . . . . . .
4.27 Fairness Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.28 Link Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.29 Node Identification Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.30 PHY Layer Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.31 Isochronous Cycle Timer Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.32 Asynchronous Request Filter High Register . . . . . . . . . . . . . . . . . . . . .
4.33 Asynchronous Request Filter Low Register . . . . . . . . . . . . . . . . . . . . .
4.34 Physical Request Filter High Register . . . . . . . . . . . . . . . . . . . . . . . . . .
4.35 Physical Request Filter Low Register . . . . . . . . . . . . . . . . . . . . . . . . . .
4.36 Physical Upper Bound Register (Optional Register) . . . . . . . . . . . . . .
4.37 Asynchronous Context Control Register . . . . . . . . . . . . . . . . . . . . . . . .
4.38 Asynchronous Context Command Pointer Register . . . . . . . . . . . . . .
4.39 Isochronous Transmit Context Control Register . . . . . . . . . . . . . . . . . .
4.40 Isochronous Transmit Context Command Pointer Register . . . . . . . .
4.41 Isochronous Receive Context Control Register . . . . . . . . . . . . . . . . . .
4.42 Isochronous Receive Context Command Pointer Register . . . . . . . .
4.43 Isochronous Receive Context Match Register . . . . . . . . . . . . . . . . . . .
Serial ROM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PHY Register Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1
Base Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2
Port Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3
Vendor Identification Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4
Vendor-Dependent Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–7
4–8
4–8
4–9
4–10
4–10
4–11
4–11
4–12
4–12
4–13
4–14
4–15
4–16
4–17
4–18
4–20
4–21
4–22
4–22
4–23
4–23
4–24
4–25
4–26
4–27
4–28
4–30
4–31
4–33
4–33
4–34
4–35
4–36
4–37
4–37
4–39
4–40
5–1
6–1
6–1
6–4
6–5
6–6
iv
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TSB43AA22PDT Related Products

TSB43AA22PDT TSB43AA22PDTG4
Description 2 CHANNEL(S), 400Mbps, SERIAL COMM CONTROLLER, PQFP128, PLASTIC, QFP-128 2 CHANNEL(S), 400Mbps, SERIAL COMM CONTROLLER, PQFP128, PLASTIC, QFP-128
Is it lead-free? Lead free Lead free
Maker Rochester Electronics Rochester Electronics
Parts packaging code QFP QFP
package instruction PLASTIC, QFP-128 PLASTIC, QFP-128
Contacts 128 128
Reach Compliance Code unknown unknown
Address bus width 32 32
boundary scan NO NO
Bus compatibility PCI PCI
maximum clock frequency 24.576 MHz 24.576 MHz
Maximum data transfer rate 50 MBps 50 MBps
External data bus width 32 32
JESD-30 code S-PQFP-G128 S-PQFP-G128
length 14 mm 14 mm
low power mode YES YES
Humidity sensitivity level 3 3
Number of serial I/Os 2 2
Number of terminals 128 128
Maximum operating temperature 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TFQFP TFQFP
Package shape SQUARE SQUARE
Package form FLATPACK, THIN PROFILE, FINE PITCH FLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius) 235 260
Certification status COMMERCIAL COMMERCIAL
Maximum seat height 1.2 mm 1.2 mm
Maximum supply voltage 3.6 V 3.6 V
Minimum supply voltage 3 V 3 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface NOT SPECIFIED NICKEL PALLADIUM GOLD
Terminal form GULL WING GULL WING
Terminal pitch 0.4 mm 0.4 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 14 mm 14 mm
uPs/uCs/peripheral integrated circuit type SERIAL IO/COMMUNICATION CONTROLLER, SERIAL SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

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