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HV21716PJ

Description
Single-Ended Multiplexer, 1 Func, 8 Channel, CMOS, PQCC28, PLASTIC, LCC-28
CategoryAnalog mixed-signal IC    The signal circuit   
File Size47KB,9 Pages
ManufacturerSupertex
Download Datasheet Parametric Compare View All

HV21716PJ Overview

Single-Ended Multiplexer, 1 Func, 8 Channel, CMOS, PQCC28, PLASTIC, LCC-28

HV21716PJ Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSupertex
Parts packaging codeQLCC
package instructionQCCJ,
Contacts28
Reach Compliance Codeunknown
Analog Integrated Circuits - Other TypesSINGLE-ENDED MULTIPLEXER
JESD-30 codeS-PQCC-J28
length11.43 mm
Humidity sensitivity level1
Number of channels8
Number of functions1
Number of terminals28
Nominal off-state isolation33 dB
On-state resistance matching specifications1.25 Ω
Maximum on-state resistance (Ron)25 Ω
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)225
Certification statusNot Qualified
Maximum seat height4.57 mm
Maximum supply voltage (Vsup)15.5 V
Minimum supply voltage (Vsup)10 V
Nominal supply voltage (Vsup)15 V
surface mountYES
Maximum disconnect time5000 ns
Maximum connection time3000 ns
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width11.43 mm

HV21716PJ Preview

HV21716
HV21816
Low Charge Injection
8-Channel High Voltage Analog Switch
Ordering Information
Package Options
Operating
V
PP
40V to 80V
80V to 150V
V
PP
– V
NN
160V
160V
28-lead plastic
chip carrier
HV21716PJ
HV21816PJ
Die
HV21716X
HV21816X
Features
s
HVCMOS
®
technology for high performance
s
Low charge injection
s
Very low quiescent power dissipation – 10µA
s
Output On-resistance typically 22 ohms
s
Low parasitic capacitances
s
DC to 10MHz analog signal frequency
s
-50dB typical output off isolation at 5MHz
s
CMOS logic circuitry for low power
s
Excellent noise immunity
s
On-chip shift register and latch logic circuitry
s
Flexible high voltage supplies
s
Surface mount package available
General Description
Not recommended for new designs. Please use HV20220 for
all new designs.
This device is a low charge injection 8-channel high-voltage ana-
log switch integrated circuit (IC) intended for use in applications
requiring high voltage switching controlled by low voltage control
signals, such as ultrasound imaging and printers. Input data is
shifted into an 8-bit shift register which can then be retained in an
8-bit latch. To reduce any possible clock feedthrough noise, Latch
Enable (LE) should be left high until all bits are clocked in. Using
HVCMOS technology, this switch combines high voltage bilateral
DMOS switches and low power CMOS logic to provide efficient
control of high voltage analog signals.
Absolute Maximum Ratings*
V
DD
logic power supply voltage
V
PP
- V
NN
supply voltage
V
PP
positive high voltage supply
V
NN
negative high voltage supply
Logic input voltages
Analog signal range
Peak analog signal current/channel
Storage temperature
Power dissipation
-0.5V to +18V
174V
-0.5V to +160V
+0.5V to -160V
-0.5V to V
DD
+0.3V
V
NN
to V
PP
3.0A
-65°C to +150°C
1.2W
* Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability.
13-66
HV21716/HV21816
Electrical Characteristics
(over operating conditions, V
PP
= +80V, V
NN
= -80V, and V
DD
= 15V unless otherwise noted)
DC Characteristics
Characteristics
Small Signal Switch (ON)
Resistance
Small Signal Switch (ON)
Resistance Matching
Large Signal Switch (ON)
Resistance
Switch Off Leakage
Per Switch
DC Offset Switch Off
DC Offset Switch On
Pos. HV Supply Current
Neg. HV Supply Current
Pos. HV Supply Current
Neg. HV Supply Current
Switch Output
Peak Current
Output Switch Frequency
I
PP
Supply Current
I
NN
Supply Current
Logic Supply
Average Current
Logic Supply
Quiescent Current
Data Out Source Current
Data Out Sink Current
f
SW
I
PP
I
NN
I
DD
I
DDQ
I
SOR
I
SINK
0.45
0.45
4.0
4.0
6.0
10
0.45
0.45
0.70
0.70
3.5
3.5
4.0
I
PPQ
I
NNQ
I
PPQ
I
NNQ
3.0
Sym
R
ONS
R
ONS
∆R
ONS
R
ONL
I
SOL
5.0
300
500
0
°
C
min
max
24
18
20
min
+25
°
C
typ
22
18
5.0
13
1.0
100
100
10
-10
10
-10
3.0
max
25
20
20
22
10
300
500
50
-50
50
-50
2.0
50
5.0
5.0
6.0
10
0.40
0.40
5.5
5.5
6.0
10
2.0
15
300
500
+70
°
C
min max
28
23
20
Units
ohms
ohms
%
ohms
µA
mV
mV
µA
µA
µA
µA
A
KHz
mA
mA
mA
µA
mA
mA
V
OUT
= V
DD
- 0.7V
V
OUT
= 0.7V
ALL SWS OFF
ALL SWS ON
I
SW
= 5mA
V
SIG
0.1% Duty Cycle
Duty Cycle = 50%
HV output switching
frequency = 50KHz
f
CLK
= 3MHz
Test Conditions
I
SIG
= 5mA
I
SIG
= 200mA
I
SW
= 5mA
V
SIG
= V
PP
-10V,
I
SIG
= 1.0A
V
SIG
= V
PP
-10V
and V
NN
+10V
R
L
= 100KΩ
R
L
= 100KΩ
13
13-67
HV21716/HV21816
AC Characteristics
Characteristics
Time to Turn Off V
SIG
*
Set Up Time Before LE Rises
Time Width of LE
Clock Delay Time to Data Out
Turn On Time
Turn Off Time
Off Isolation
Sym
min
t
SIG (OFF)
t
SD
t
WLE
t
DO
t
ON
t
OFF
KO
-30
-45
Clock Freq
Set Up Time Data to Clock
Hold Time Data from Clock
Switch Crosstalk
Off Capacitance SW to GND
On Capacitance SW to GND
Output Voltage Spike
f
CLK
t
SU
t
H
K
CR
C
SG(OFF)
C
SG(ON)
+V
SPK
–V
SPK
* Time required for analog signal to turn off before output switch turns off (critical timing).
0
°
C
max
min
0
150
150
175
3.0
5.0
-30
-45
5.0
15
35
-60
5.0
25
17
50
15
35
-60
5.0
25
150
150
+25
°
C
typ
max
min
+70
°
C
max
Units
ns
Test Conditions
150
150
175
3.0
5.0
-33
-50
5.0
8.0
-70
12
38
150
150
17
50
20
35
-60
5.0
25
17
50
-30
-45
5.0
190
3.0
5.0
ns
ns
ns
µs
µs
dB
dB
MHz
ns
ns
dB
pF
pF
mV
f = 5MHz,
50Ω load
0V, 1MHz
0V, 1MHz
V
PP
= +80V,
V
NN
= -80V,
R
L
= 50Ω
R
L
= 10KΩ
R
L
= 10KΩ
f = 5MHz,
1KΩ// 15pF load
f = 5MHz,
50Ω load
50% duty cycle
f
DATA
= f
CLK
/2
Operating Conditions*
Device
Symbol
V
PP1, 3
V
NN1, 3
V
DD1, 3
V
IH
V
IL
V
SIG2
T
A
HV21716
X
X
X
X
X
X
X
X
X
X
X
X
X
X
HV21816
Value
40V to 80V
80V to 150V
-10V to V
PP
-160V
10V to 15.5V
V
DD
-2.0V to V
DD
0V to 2.0V
V
NN
+10V to V
PP
-10
0°C to 70°C
Notes:
1. Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.
2. V
SIG
must be V
NN
V
SIG
V
PP
or floating during power up/down transistion.
3. Rise and fall times of power supplies, V
DD,
V
PP,
and V
NN
should not be less than 1.0msec.
13-68
HV21716/HV21816
Test Circuits
V
PP
–10
I
SOL
V
IN
= 10 V
P–P
@5MHz
50Ω
NC
V
PP
–10V
R
L
V
OUT
10KΩ
V
NN
+10
50Ω
+80V
–80V
V
PP
V
NN
V
DD
GND
15V
+80V
–80V
V
PP
V
NN
V
DD
GND
V
OUT
V
IN
15V
+80V
–80V
V
PP
V
NN
V
DD
GND
15V
K
CR
= 20Log
Switch OFF Leakage
Crosstalk
T
ON
/T
OFF
V
IN
= 10 V
P–P
@5MHz
+V
SPK
V
OUT
V
OUT
–V
SPK
50Ω
V
OUT
R
L
100KΩ
R
L
1KΩ
R
L
+80V
–80V
V
PP
V
NN
V
DD
GND
V
OUT
V
IN
15V
+80V
–80V
V
PP
V
NN
V
DD
GND
15V
+80V
-80V
V
PP
V
NN
V
DD
GND
15V
K
O
= 20Log
OFF Isolation
DC Offset ON/OFF
Output Voltage Spike
Logic Timing Waveforms
D
N – 1
DATA
IN
50%
D
N
50%
D
N + 1
13
LE
50%
50%
t
WLE
t
SD
50%
50%
t
h
t
DO
CLOCK
t
SU
DATA
OUT
50%
t
OFF
t
ON
VOUT OFF
(TYP)
ON
90%
10%
13-69
HV21716/HV21816
Logic Diagram
LATCHES
D
IN
D
LE
D
LE
D
LE
D
LE
8 BIT
SHIFT
REGISTER
D
LE
D
LE
D
LE
D
LE
LEVEL
SHIFTERS
OUTPUT
SWITCHES
SW0
CLK
SW1
SW2
SW3
SW4
SW5
D
OUT
SW6
SW7
V
NN
V
PP
V
DD
LE
Truth Table
D0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
X
X
X
X
X
D1
D2
D3
D4
D5
D6
D7
LE SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
HOLD PREVIOUS STATE
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
Notes:
1. The eight switches operate
independently.
2. Serial data is clocked in on the L→ H
transition CLK.
3. The switches go to a state retaining
their present condition at the rising
edge of LE. When LE is low the shift
register data flows through the latch.
4. D
OUT
is high when switch 7 is on.
5. Shift register clockng has no effect on
the switch states if LE is H.
13-70

HV21716PJ Related Products

HV21716PJ HV21716X
Description Single-Ended Multiplexer, 1 Func, 8 Channel, CMOS, PQCC28, PLASTIC, LCC-28 Single-Ended Multiplexer, 1 Func, 8 Channel, CMOS, DIE-25
Maker Supertex Supertex
Parts packaging code QLCC DIE
package instruction QCCJ, DIE,
Contacts 28 25
Reach Compliance Code unknown unknown
Analog Integrated Circuits - Other Types SINGLE-ENDED MULTIPLEXER SINGLE-ENDED MULTIPLEXER
JESD-30 code S-PQCC-J28 R-XUUC-N25
Number of channels 8 8
Number of functions 1 1
Number of terminals 28 25
Nominal off-state isolation 33 dB 33 dB
On-state resistance matching specifications 1.25 Ω 1.25 Ω
Maximum on-state resistance (Ron) 25 Ω 25 Ω
Maximum operating temperature 70 °C 70 °C
Package body material PLASTIC/EPOXY UNSPECIFIED
encapsulated code QCCJ DIE
Package shape SQUARE RECTANGULAR
Package form CHIP CARRIER UNCASED CHIP
Certification status Not Qualified Not Qualified
Maximum supply voltage (Vsup) 15.5 V 15.5 V
Minimum supply voltage (Vsup) 10 V 10 V
Nominal supply voltage (Vsup) 15 V 15 V
surface mount YES YES
Maximum disconnect time 5000 ns 5000 ns
Maximum connection time 3000 ns 3000 ns
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal form J BEND NO LEAD
Terminal location QUAD UPPER
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