LRS1811 datasheet, PDF - EEWORLD Datasheet

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LRS1811: DescriptionMemory Circuit, 4MX16, CMOS, PBGA72, 8 X 11 MM, PLASTIC, CSP-72; Categorystorage storage; File Size767KB，47 Pages; ManufacturerSHARP; Websitehttp://sharp-world.com/products/device/

Download Datasheet Parametric View All

LRS1811 Overview

Memory Circuit, 4MX16, CMOS, PBGA72, 8 X 11 MM, PLASTIC, CSP-72

LRS1811 Parametric

Parameter Name	Attribute value
Maker	SHARP
package instruction	8 X 11 MM, PLASTIC, CSP-72
Reach Compliance Code	unknown
Other features	CONTAINS 2M X 16 BITS COMBO RAM
JESD-30 code	R-PBGA-B72
length	11 mm
memory density	67108864 bit
Memory IC Type	MEMORY CIRCUIT
memory width	16
Number of functions	1
Number of terminals	72
word count	4194304 words
character code	4000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-25 °C
organize	4MX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
Maximum seat height	1.4 mm
Maximum supply voltage (Vsup)	3.3 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	8 mm

LRS1811 Preview

RELIMINARY

RODUCT

PECIFICATIONS

Integrated Circuits Group

LRS1811

64M (x16) Flash and 32M (x16) Smartcombo RAM

(Model No.: LRS1811)

Stacked Chip

Spec No.: MFM2-J13907A

Issue Date: October 31, 2001

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L R S 1 8 11

•

Handle this document carefully for it contains material protected by international copyright law.

Any reproduction, full or in part, of this material is prohibited without the express written permission

of the company.

•

When using the products covered herein, please observe the conditions written herein and the

precautions outlined in the following paragraphs. In no event shall the company be liable for

any damages resulting from failure to strictly adhere to these conditions and precautions.

(1) The products covered herein are designed and manufactured for the following application areas.

When using the products covered herein for the equipment listed in Paragraph (2), even for the

following application areas, be sure to observe the precautions given in Paragraph (2). Never use

the products for the equipment listed in Paragraph (3).

•

Office electronics

Instrumentation and measuring equipment

Machine tools

Audiovisual equipment

Home appliance

Communication equipment other than for trunk lines

(2) Those contemplating using the products covered herein for the following equipment

which demands high reliability, should first contact a sales representative of the company and

then accept responsibility for incorporating into the design fail-safe operation, redundancy, and

other appropriate measures for ensuring reliability and safety of the equipment and the overall

system.

• Control and safety devices for airplanes, trains, automobiles, and other transportation

equipment

• Mainframe computers

• Traffic control systems

• Gas leak detectors and automatic cutoff devices

• Rescue and security equipment

• Other safety devices and safety equipment, etc.

(3) Do not use the products covered herein for the following equipment which demands extremely

high performance in terms of functionality, reliability, or accuracy.

•

Aerospace equipment

Communications equipment for trunk lines

Control equipment for the nuclear power industry

Medical equipment related to life support, etc.

(4) Please direct all queries and comments regarding the interpretation of the above three

Paragraphs to a sales representative of the company.

•

Please direct all queries regarding the products covered herein to a sales representative of the

company.

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Contents

1. Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2. Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

3. Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 Bus Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 Simultaneous Operation Modes Allowed with Four Planes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4. Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5. Command Definitions for Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.1 Command Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.2 Identifier Codes for Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.3 Functions of Block Lock and Block Lock-Down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.4 Block Locking State Transitions upon Command Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.5 Block Locking State Transitions upon F-WP Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6. Status Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7. Memory Map for Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

8. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

9. Recommended DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

10. Pin Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

11. DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

12. AC Electrical Characteristics for Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.1 AC Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.2 Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.3 Write Cycle (F-WE / F-CE Controlled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.4 Block Erase, Full Chip Erase, (Page Buffer) Program Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.5 Flash Memory AC Characteristics Timing Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12.6 Reset Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13. AC Electrical Characteristics for Smartcombo RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.1 AC Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.2 Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.3 Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.4 Power Up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.5 Sleep Mode Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.6 Address Skew Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.7 Data Retention Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13.8 Smartcombo RAM AC Characteristics Timing Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14. Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

15. Flash Memory Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

16. Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

17. Related Document Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

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1. Description

The LRS1811 is a combination memory organized as 4,194,304 x16 bit flash memory and 2,097,152 x16 bit Smartcombo RAM

in one package.

Features

- Power supply

- Operating temperature

- Not designed or rated as radiation hardened

- 72pin CSP (LCSP072-P-0811) plastic package

- Flash memory has P-type bulk silicon, and Smartcombo RAM has P-type bulk silicon

Flash Memory

- Access Time

Read

Word write

Block erase

Reset Power-Down

Standby

- Optimized Array Blocking Architecture

Eight 4K-word Parameter Blocks

One-hundred and twenty-seven 32K-word Main Blocks

Top Parameter Location

- Extended Cycling Capability

100,000 Block Erase Cycles

(F-V

= 1.65V to 3.3V)

1,000 Block Erase Cycles and total 80 hours (F-V

= 11.7V to 12.3V)

- Enhanced Automated Suspend Options

Word Write Suspend to Read

Block Erase Suspend to Word Write

Block Erase Suspend to Read

Smartcombo RAM

- Access Time

- Cycle time

- Power Supply current

Operating current

Standby current (Data retention current)

Sleep Mode (Data non-retention current)

• • • •

2.7V to 3.3V(Flash)

2.7V to 3.1V(Smartcombo RAM)

-25°C to +85°C

• • • •

85 ns

25 mA

60 mA

30 mA

25 µA

(Max.)

(Max. t

CYCLE

= 200ns, CMOS Input)

(Max.)

(Max. F-RST = GND ± 0.2V,

OUT

(F-RY/BY) = 0mA)

(Max. F-CE = F-RST = F-V

± 0.2V)

- Power supply current (The current for F-V

pin and F-V

pin)

• • • •

85 ns

(Max.)

85 to 32,000 ns

40 mA

140 µA

30 µA

(Max. t

, t

= Min.)

(Max.)

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2. Pin Configuration

INDEX

(TOP View)

GND

S-WE DQ

F-

F-WE RY/BY F-A

S-A

GND F-RST

S-CE

S-V

F-V

S-CE

F-WP F-V

S-LB S-UB S-OE

F-A

F-CE GND F-OE

Note) From T

to T

pins are needed to be open.

Two NC pins at the corner are connected.

Do not float any GND pins.

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