34AA02/34LC02
2K I
2
C
™
Serial EEPROM Software Write-Protect
Features:
• Permanent and Resettable Software Write-Protect
for Lower Half of the Array (00h-7Fh)
• Single Supply with Operation Down to 1.7V
• Low-Power CMOS Technology:
- Read current 1 mA, typical
- Standby current, 100 nA, typical
• 2-Wire Serial Interface Bus, I
2
C™ Compatible
• Cascadable up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Compatibility
• 1 MHz Clock for LC Versions
• Page Write Time 3 ms, typical
• Self-Timed Erase/Write Cycle
• 16-Byte Page Write Buffer
• ESD Protection > 4,000V
• Software Write Protection for Lower 128 Bytes
• Hardware Write Protection for Entire Array
• More than 1 Million Erase/Write Cycles
• Data Retention > 200 Years
• 8-Lead PDIP, SOIC, TSSOP, MSOP and TDFN
Packages
• 6-Lead SOT-23 Package
• Pb-free and RoHS Compliant
• Available for Extended Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Package Types
PDIP/SOIC/TSSOP/MSOP/TDFN
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
A0 1
A1 2
A2 3
V
SS
4
8 V
CC
7 WP
6 SCL
5 SDA
SOT-23
SCL
V
SS
SDA
1
2
3
6 V
CC
5
A0
4 A1
Description:
The Microchip Technology Inc. 34AA02/34LC02
(34XX02*) is a 2 Kbit Electrically Erasable PROM
capable of operation across a broad voltage range
(1.7V to 5.5V). This device has two software write-
protect features for the lower half of the array, as well
as an external pin that can be used to write-protect the
entire array. This allows the system designer to protect
none, half, or all of the array, depending on the
application. The device is organized as one block of
256 x 8-bit memory with a 2-wire serial interface. Low-
voltage design permits operation down to 1.7V, with
standby and active currents of only 100 nA and 1 mA,
respectively. The 34XX02 also has a page write
capability for up to 16 bytes of data. The 34XX02 is
available in the standard 8-pin PDIP, surface mount
SOIC, TSSOP, MSOP and TDFN packages. The
34XX02 is also available in the 6-lead, SOT-23
package.
Device Selection Table
Part
Number
34AA02
34LC02
Note 1:
V
CC
Range
1.7-5.5
2.2-5.5
Max. Clock
Frequency
400 kHz
(1)
1 MHz
Temp
Ranges
I,E
I,E
100 kHz for V
CC
<1.8V.
*34XX02 is used in this document as a generic part number
for the 34AA02/34LC02 devices.
2011 Microchip Technology Inc.
DS22029F-page 1
34AA02/34LC02
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
..........................................................................................................-0.3V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins
4 kV
† NOTICE:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC SPECIFICATIONS
V
CC
= +1.7V to +5.5V
Industrial (I): T
A
= -40°C to +85°C
Automotive (E):T
A
= -40°C to +125°C
Min.
—
0.7 V
CC
—
0.05 V
CC
—
7
V
CC
+ 4.8
10
Typ.
—
—
—
—
—
—
—
—
—
—
—
0.1
0.05
0.01
—
Max.
—
—
0.3 V
CC
—
0.40
10
10
V
CC
+ 4.8
±1
±1
10
3
1
1
5
Units
—
V
V
V
V
V
V
V
A
A
pF
mA
mA
A
A
—
—
0.2 V
CC
for V
CC
< 2.5V
(Note)
I
OL
= 3.0 mA, V
CC
= 2.5V
A0 Pin only, V
CC
< 2.2V
A0 Pin only, V
CC
2.2V
A0 Pin only, V
CC
5.2V
V
IN
= V
SS
or V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 5.5V
(Note)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 5.5V, SCL = 1 MHz
—
Industrial
Automotive
SDA = SCL = V
CC
A0, A1, A2, WP = V
SS
Conditions
DC CHARACTERISTICS
Param.
Symbol
No.
—
D1
D2
D3
D4
D5
V
IH
V
IL
V
HYS
V
OL
V
HV
Characteristic
A0, A1, A2, SCL, SDA
and WP pins
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt
Trigger inputs
Low-level output voltage
High-Voltage Detect
D6
D7
D8
D9
D10
D11
I
LI
I
LO
C
IN
,
C
OUT
I
CC
read
I
CCS
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
—
—
—
—
—
—
—
I
CC
write Operating current
Standby current
Note:
This parameter is periodically sampled and not 100% tested.
2011 Microchip Technology Inc.
DS22029F-page 3
34AA02/34LC02
TABLE 1-2:
AC SPECIFICATIONS
V
CC
= +1.7V to +5.5V
Industrial (I): T
A
= -40°C to +85°C
Automotive (E):T
A
= -40°C to +125°C
Characteristic
Clock frequency
Min.
—
—
—
4000
600
500
4700
1300
500
—
—
—
—
—
—
4000
600
250
4700
600
250
0
250
100
100
4000
600
250
4000
600
600
4700
600
600
—
—
—
1300
4700
—
—
1M
Max.
100
400
1000
—
—
—
—
—
—
1000
300
300
1000
300
300
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3500
900
400
—
—
—
50
5
—
Units
kHz
Conditions
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
(Note
2)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
2.5V
V
CC
5.5V (34LC02)
All except 34LC02
(Note
1
and
Note 3)
—
25°C, V
CC
= 5.5V, Block mode
(Note
4)
AC CHARACTERISTICS
Param.
No.
1
Symbol
F
CLK
2
T
HIGH
Clock high time
ns
3
T
LOW
Clock low time
ns
4
T
R
SDA and SCL rise time
(Note
1)
ns
5
T
F
SDA and SCL fall time
(Note
1)
ns
6
T
HD
:
STA
Start condition hold time
ns
7
T
SU
:
STA
Start condition setup time
ns
8
9
T
HD
:
DAT
T
SU
:
DAT
Data input hold time
Data input setup time
ns
ns
10
T
SU
:
STO
Stop condition setup time
ns
11
T
SU
:
WP
WP setup time
ns
12
T
HD
:
WP
WP hold time
ns
13
T
AA
Output valid from clock
(Note
2)
ns
14
T
BUF
Bus free time: Time the bus must be
free before a new transmission can
start
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or page)
Endurance
ns
16
17
18
Note
1:
2:
3:
4:
T
SP
T
WC
—
ns
ms
cycles
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the
falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved noise spike suppres-
sion. This eliminates the need for a T
I
specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult
the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
DS22029F-page 4
2011 Microchip Technology Inc.
PCB Design
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