HT16566
1/2 Duty VFD Digital Clock
Features
·
VFD display 24 hour clock function
·
Directly drive VFD panels at 1/2 Duty cycle
·
4.194304MHz crystal oscillation
·
Zero adjust function
·
Integrated voltage regulator permits wide 4V to 18V
operating voltage range
·
Four levels of illumination control function
·
30-pin SSOP package
General Description
The HT16566 provides direct drive to VFD panels to im-
plement a 24 hour clock function. Obtaining its time
base from a 4.194304MHz crystal oscillation source
and in having a wide operating voltage due to its internal
voltage regulator, the device also contains a host of
other features. These include a choice of adjustment
modes, including single push increment or 2Hz fast for-
ward functions. Additional features are provided in the
form of Blank control, Zero adjustment and four levels of
illumination control.
Block Diagram
V C C
V S S
V
D D
V
D D
V o lta g e R e g u la to r C ir c u it
V D D
V
D D
H o u r C o u n te r
A /C
V
T im e A d ju s tm e n t
D D
1 a , 3 a
1 b , 3 b
1 c , 3 c
1 d , 3 d
1 e , 3 e
1 f, 3 f
1 g , 3 g
2 a , 2 d , 4 a
2 b , 4 b
2 c , c o l*
2 c , c o l'*
2 e , 4 e
2 f, 4 c
Z A
V
M in u te C o u n te r
D D
S e g m e n t
D e c o d e r
S e g m e n t O u tp u t D r iv e r
H S
V
D D
S e c o n d C o u n te r
M S
B L A N K
T E S T
C o lo n
F re q u e n c y
2 g , 4 g , 4 d
6 4 H z
X T
O s c illa to r
X T
D IM 1
B r ig h tn e s s A d ju s tm e n t
D IM 2
G r id
D e c o d e r
F r e q u e n c y D r iv e r C ir c u it
G r id O u tp u t D r iv e r
G R 1
G R 2
Note:
²*²
col indicates a blink colon and col¢ indicates a continuous light colon.
Rev. 1.10
1
December 17, 2010
HT16566
Pin Assignment
G R 2
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
V C C
V D D
6 4 H z
T E S T
B L A N K
D IM 1
D IM 2
X T
X T
V S S
A /C
Z A
H S
M S
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
G R 1
2 a , 2 d , 4 a
2 b , 4 b
2 f, 4 c
2 c , c o l*
2 c , c o l'*
2 e , 4 e
2 g , 4 g , 4 d
1 d , 3 d
1 e , 3 e
1 c , 3 c
1 g , 3 g
1 f, 3 f
1 b ,3 b
1 a , 3 a
H T 1 6 5 6 6
3 0 S S O P -A
Note:
²*²
col indicates a blink colon and col¢ indicates a continuous light colon.
Pin Description
Pin Name
VCC
VDD
VSS
DIM1
DIM2
A/C
I/O
¾
O
¾
I
I
I
High voltage power supply pin.
Built-in regulator voltage output pin for the device internal circuits.
Ground pin.
Illumination level control pins.
Internally connected to pull-down resistors.
When the A/C pin is low, the internal circuits are reset.
The reset pulse width should be more than 2ms.
Internally connected to a pull-high resistor.
Zero Adjustment pin.
Internally connected to a pull-high resistor.
Hour Adjustment pin.
Internally connected to a pull-high resistor.
Minute Adjustment pin.
Internally connected to a pull-high resistor.
When low the Blank input pin will extinguish the display.
Internally connected to a pull-down resistor.
Crystal oscillator pin
XT
TEST
64Hz
GR1
GR2
1a,3a ~
2b,4b,4c
I
I
O
O
Grid output pins for 1/2 duty VFD
O
O
Segment output pins for 1/2 duty VFD
IC test pin - should be left open or kept at a low level
64Hz signal output pin for oscillation frequency adjustment
Description
ZA
HS
MS
BLANK
XT
I
I
I
I
O
Rev. 1.10
2
December 17, 2010
HT16566
Approximate Internal Connections
D IM 1 , D IM 2 , T E S T , B L A N K
A /C , Z A , H S , M S
V
V
V
C C
6 4 H z
V
D D
C C
D D
V
D D
V S S
V S S
V S S
1 a , 3 a ~ 1 g , 3 g ; 2 a , 2 d ~ 2 g ;
G R 1 , G R 2
X T , X T
V
C C
X T
( O s c illa to r O u tp u t)
X T
( O s c illa to r In p u t)
V S S
V S S
Absolute Maximum Ratings
Logic Supply Voltage .................V
SS
-0.3V
to V
SS
+6.5V
High Input Voltage .....................V
SS
-0.3V
to V
CC
+0.3V
Logic Input Voltage ....................V
SS
-0.3V
to V
DD
+0.3V
Driver Output Voltage..........................V
SS
-0.3V
to V
CC
Driver Output Current (Grid Driver) ......-7mA to +20mA
Operating Temperature.........................-40°C to +85°C
Note: These are stress ratings only. Stresses exceeding the range specified under
²Absolute
Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Driver Supply Voltage .................V
SS
-0.3V
to V
SS
+20V
High Output Voltage ..................V
SS
-0.3V
to V
CC
+0.3V
Logic Output Voltage .................V
SS
-0.3V
to V
DD
+0.3V
Driver Output Current (Segment Driver)
-10mA
to +2mA
Storage Temperature ..........................-55°C to +150°C
Recommended Operating Conditions
Symbol
V
CC
f
OSC
t
OP
Parameter
Power Supply Voltage
Oscillation Frequency
Operating Temperature
Min.
4
¾
-40
Typ.
¾
4.194304
¾
Max.
18
¾
85
Unit
V
MHz
°C
Rev. 1.10
3
December 17, 2010
HT16566
Functional Description
VFD Display Driving
The display can directly drive VFD signals dynamically
and does so at a 1/2 duty cycle rate. The clock will be
displayed in a 24-hour format with the hours ranging
from 0 to 23 and minutes from 00 to 59. If the most sig-
nificant numeral is zero then the display will be extin-
guished.
·
Grid and segment connections
The TEST pin is used during manufacturing for device
testing purposes and should not be connected to any
external circuitry.
Two illumination level set pins, DIM1 and DIM2, are pro-
vided to give control over the display brightness level, as
shown in the following table.
Switch Pin
Name
Dim1
L
Dim2
L
L
H
H
f=256Hz, 1/2 duty (50% display)
f=256Hz, 1/4 duty (25% display)
f=256Hz, 1/8 duty (12.5% display)
f=256Hz, 1/16 duty (6.25% display)
A single 7-segment display is shown below showing
the illumination pattern for each numeral.
A
F
G
D
C
E
B
Operating mode
7 -S e g m e n ts
H
L
As the device is designed for clock applications, four
7-segment displays are required to display the correct
time output. The connections for the grids and seg-
ments are shown below, however it should be noted
that the fourth segment only requires two of its seg-
ments to be driven. Additionally it should be noted that
the colon can also be illuminated.
G R 2
4 a
4 g
4 e
4 d
d ig it4
4 c
4 b
3 e
3 f
3 d
d ig it3
3 a
3 g
3 c
3 b
2 e
c o l
c o lo n
c o l
G R 1
2 a
2 f
2 d
d ig it2
2 g
2 c
2 b
1 e
1 f
1 d
d ig it1
1 a
1 g
1 c
1 b
H
Device Functions
·
Reset
Although the device is provided with an external reset
pin A/C, the device will in fact reset itself when power
is applied, eliminating the need for external reset com-
ponents. The usual provision of an external capacitor
is not required as an internal reset capacitor is inte-
grated within the device.
·
Internal regulator
An internal regulator function is also integrated within
the device providing a stable voltage power supply
source for the internal circuits. This allows the device
to operate with a wide external power supply ranging
from 4V to 18V.
·
Chatter removal
Other Pin Functions
The external reset pin A/C is used to reset the internal
circuits of the device. When this pin is pulled low the de-
vice will be reset, when the pin is allowed to go high, via
its internal pull-high resistor, then the display will indi-
cate a
²0:00²
output.
The BLANK pin, if pulled low will extinguish the display.
Note that during the time when the BLANK pin is low, the
HS, MS and ZA pins will be automatically disabled by
the device and have no function.
The 64Hz pin allows monitoring of the system frequency
to allow frequency adjustments to be executed. As the
name suggests, this output pin will continuously output
a frequency of 64Hz.
The device contains circuits which are connected to
input pins HS, MS and ZA to remove chatter of less
than 31.25ms.
·
Oscillator
The basic time base frequency for this device is deter-
mined by an external 4.194304MHz crystal. When an
external crystal along with two small external capaci-
tors are connected to the two oscillator XT pins, the in-
ternal oscillator circuit will ensure generation of the
correct time base signals. The oscillation frequency,
although determined by the external crystal fre-
quency, will also be influenced by the external capaci-
tors, the crystal inherent capacitance and the residual
capacitance of the external PCB tracks. To ensure ac-
curate frequency generation, the crystal specification
should be carefully consulted and the external capaci-
tors and crystal should be placed as close to the de-
vice as possible.
Rev. 1.10
5
December 17, 2010
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