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Rev. 2.5, 11/2002
Switch Mode Power Supply with
Multiple Linear Regulators and
High Speed CAN Transceiver
The 33394 is a multi–output power supply integrated circuit with high
speed CAN transceiver. The IC incorporates a switching pre–regulator
operating over a wide input voltage range from +4.0V to +26.5V (with
transients up to 45V).
The switching regulator has an internal 3.0A current limit and runs in both
buck mode or boost mode to always supply a pre–regulated output followed
by Low Drop Out (LDO) regulators: VDDH / 5.0V @ 400mA; VDD3_3 / 3.3V
@ 120mA; VDDL / 2.6V (User scalable between 3.3V – 1.25V) @ 400mA
typically, using an external NPN pass transistor. The Keep Alive regulator
VKAM (scalable) @ 50mA; FLASH memory programming voltage VPP /
5.0V or 3.3V @ 150mA; three sensor supply outputs VREF(1,2,3) / 5.0V
(tracking VDDH) @ 100mA each; and a switched battery output (VSEN) to
supply 125mA clamped to 17V.
Additional features include Active Reset circuitry watching VDDH,
VDD3_3, VDDL and VKAM, user selectable Hardware Reset Timer (HRT),
Power Sequencing circuitry guarantees the core supply voltages never
exceed their limits or polarities during system power up and power down.
A high speed CAN transceiver physical layer interfaces between the
microcontroller CMOS outputs and differential bus lines. The CAN driver is
short circuit protected and tolerant of loss of battery or ground conditions.
33394 is designed specifically to meet the needs of modules, which use
the MPC565 microcontroller, though it will also support others from the
MPC5XX family of Motorola microcontrollers.
Features:
•
Wide operating input voltage range: +4.0V to +26.5V (+45V transient).
33394
MULTI–OUTPUT
POWER SUPPLY
SEMICONDUCTOR
TECHNICAL DATA
44–Lead HSOP
DH SUFFIX
CASE 1291
44–Lead QFN
FC SUFFIX
CASE 1310
(BOTTOM VIEW)
•
•
•
•
•
•
Provides all regulated voltages for MPC5XX MCUs and other ECU’s
logic and analog functions.
Accurate power up/down sequencing.
Provides necessary MCU support monitoring and fail–safe support.
Provides three 5.0 V buffer supplies for internal & external (short–circuit
protected) sensors.
Includes step–down/step–up switching regulator to provide supply
voltages during different battery conditions.
Interfaces Directly to Standard 5.0V I/O for CMOS Microprocessors by
means of Serial Peripheral Interface.
PIN CONNECTIONS
INV
VCOMP
VPRE
VPRE_S
VDDH
VREF2
VREF3
DO
SCLK
DI
CS
VBAT
VBAT
KA_VBAT
VIGN
VKAM
/SLEEP
VKAM_FB
HRT
VSEN
CANH
REGON
CANL
WAKEUP
GND
VREF1
CANTXD
VPP_EN
CANRXD
VPP
/PORESET
VDD3_3
/HRESET
VDD3_3FB
/PRERESET
VDDL_X
VDDL_FB
VDDL_B
VDDL_FB
/PRERESET
/HRESET
/PORESET
CANRXD
CANTXD
1
SW1
SW1
SW1
BOOT
SW2G
GND
INV
VCOMP
VPRE
VPRE_S
VDDH
VREF2
VREF3
DO
SCLK
DI
CS
/SLEEP
HRT
CANH
CANL
GND
54–Lead SOICW–EP
DWB SUFFIX
CASE 1377
PIN CONNECTIONS
GND
CANL
CANH
HRT
/SLEEP
N/C
CS
DI
SCLK
DO
N/C
VREF3
VREF2
VDDH
VPRE_S
VPRE
VCOMP
INV
GND
SW2G
BOOT
N/C
SW1
SW1
SW1
SW1
SW1
1
CANTXD
CANRXD
/PORESET
/HRESET
/PRERESET
N/C
VDDL_FB
VDDL_B
VDDL_X
VDD3_3FB
VDD3_3
VPP
VPP_EN
VREF1
WAKEUP
REGON
VSEN
VKAM_FB
VKAM
VIGN
N/C
KA_VBAT
VBAT
VBAT
VBAT
VBAT
VBAT
GND
SW2G
BOOT
SW1
SW1
SW1
VBAT
VBAT
KA_VBAT
VIGN
VKAM
1
SOICW
QFN
HSOP
This document contains information on a new product. Specifications
and information herein are subject to change without notice.
©
Motorola, Inc. 2002
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
VKAM_FB
VSEN
REGON
WAKEUP
VREF1
VPP_EN
VPP
VDD3_3
VDD3_3FB
VDDL_X
VDDL_B
TOP VIEW
1
33394
To Q3
Dp1
+
–
KA_VBAT
3
ON
Control
OFF
10 nF
2.6 V
VKAM
VKAM
Keep–Alive
Adj. Volt.
60 mA
I–Lim
4.7 k
VIGN
4
Lf1
6.8 H
Figure 1. 33394DH – Simplified Block Diagram and Typical Application
VBAT
SW1
42–44
Oscillator
Feed
Forward
Ramp
Generator
Cb
100 nF
Buck
Control
Logic
Boost
+
–
40 k
+
–
–
+
Vbg
High–Side
Drive
Low–Side
Drive
BOOT
41
SW2G
40
39
GND
Q1
m
L1
47 H
m
D2
VPRE
5.6 V
+
Dp2
Cf1
10 F
m
+
1, 2
Cf2
100 F
m
C1
100 F
m
+
D1
MTD20N03HDL
+
10 nF
22 k
5
22 F
m
VKAM_FB
20 k
6
INV
38
Cc3
3.3 nF
Rc2
100 k
Cc2
Rc3
430R
11.7 k 100 pF
Cc1
VSEN
7
REGON
8
WAKEUP
9
5.0 V
VREF1
VSEN
VBAT Volt.
125 mA
T–Lim, I–Lim
CANRXD
Sleep
VREF1
5.0 V
100 mA
LDO
T–Lim, I–Lim
CAN
Wakeup
Logic
Vbg
VPP
5.0 V/3.3 V
150 mA
LDO
T–Lim, I–Lim
Band Gap
Reference
VREF2
5.0 V
100 mA
LDO
T–Lim, I–Lim
VDDH
5.0 V
400 mA
LDO
T–Lim, I–Lim
Enable
VCOMP 1.0 nF
37
36
35
VPRE
VPRE_S
VDDH
34
47 F
5.0 V
+
10 nF
10
1.0 F
VPP_EN
m
m
+
10 nF
5.0 V/3.3 V
VPP
11
VREF2
33
1.0 F
5.0 V
+
10 nF
12
47 F
VDD3_3
13
VDD3_FB
m
m
+
10 nF
3.3 V
10 nF 47 F
m
+
14
VQ3
VDD3_3
3.3 V
120 mA
LDO, Pass
T–Lim, I–Lim
Standby
Control
VREF3
5.0 V
100 mA
LDO
T–Lim, I–Lim
VREF3
32
1.0 F
5.0 V
VPRE
m
+
10 nF
Q2
MJD31C
VDDL
2.6 V
Q3
MJD31C
VDDL_B VDDL Drive
15 VDDL_X Adj. Volt.
40 mA
16 VDDL_FB Dual Pass
T–Lim
17
18
Reset
Detection
VDDH,
VDD3_3,
VDDL
16 Bit
SPI
Control
Fault Rep.
31
30
29
28
DO
SCLK
DI
CS
VDDH
5.0 V
+
10 nF
47 F
100R
m
110R
/PRERESET
Sleep
27
High–Speed CAN
Transceiver
HRT
POR Timer
26
/SLEEP
47 k
/HRESET 19
/PORESET
20
10 k
10 k
10 k
1.0 F
21
CANRXD
22
23
24
25
CANL
m
Notes:
Notes:
Notes:
Notes:
CANH
CANTXD
120 R
GND
1. In this configuration the device can operate with a minimum input voltage VBAT of 4.0 V (voltage at 33394 VBAT pins).
2.VDDL and VKAM are adjustable to support current microprocessor technology (1.25 V to 3.3 V) by means of an external resistor divider.
3. When the 33394 CAN transceiver is not used, CANL and CANH pins can be shorted together.
4. Dp1 = reverse battery protection diode. Dp2 = load dump protection diode. Dp1, Dp2 can be ommitted in those applications which do not require such protection.
VKAM
2.6 V
2
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33394
PIN FUNCTION DESCRIPTION (44–HSOP Package)
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NAME
VBAT
VBAT
KA_VBAT
VIGN
VKAM
VKAM_FB
VSEN
REGON
WAKEUP
VREF1
VPP_EN
VPP
VDD3_3
VDD3_3FB
VDDL_X
VDDL_B
VDDL_FB
/PRERESET
/HRESET
/PORESET
CANRXD
CANTXD
GND
CANL
CANH
HRT
/SLEEP
CS
DI
SCLK
DO
VREF3
VREF2
VDDH
VPRE_S
VPRE
VCOMP
INV
GND
SW2G
BOOT
SW1
SW1
SW1
DESCRIPTION
Battery supply to IC (external reverse battery protection needed in some applications)
Battery supply to IC (external reverse battery protection needed in some applications)
Keep alive supply (with internal protection diode)
Turn–On control through ignition switch (with internal protection diode)
VDDL tracking Keep Alive Memory (Standby) supply
VKAM output feedback
Switched battery output
Regulator “Hold On” input
CAN wake up event output
VDDH tracking linear regulator 1
VPP enable
5.0 V/ 3.3 V FLASH memory programming supply, tracking VDDH/VDD3_3
3.3 V regulated supply output, base drive for optional external pass transistor
VDD3_3 output feedback
VDDL optional external pass transistor base drive, operating in Boost Mode only
VDDL external pass transistor base drive
VDDL output feedback
Open drain /PRERESET output, occurs 0.7 us prior to /HRESET (Hardware Reset)
Open drain / HRESET (Hardware Reset) output
Open drain / PORESET (Power On Reset) supervising VKAM supply to the microprocessor.
CAN receive data (DOUT)
CAN transmit data (DIN)
Ground
CAN differential bus drive low line
CAN differential bus drive high line
Hardware Reset Timer pin (programmed with external capacitor and resistor)
Sleep Mode & Power Down control
SPI chip select
SPI serial data in
SPI clock input
SPI serial data out
VDDH tracking linear regulator 3
VDDH tracking linear regulator 2
5.0 V regulated supply output
Switching pre–regulator output sense
Switching pre–regulator output
Switching pre–regulator compensation (error amplifier output)
Switching pre–regulator error amplifier inverting input
Ground
External power switch (MOSFET) gate drive — Boost regulator
Bootstrap capacitor
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
NOTE: The exposed pad of the 44 HSOP package is electrically and thermally connected with the IC ground.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
3
33394
PIN FUNCTION DESCRIPTION (44–QFN Package)
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NAME
GND
SW2G
BOOT
SW1
SW1
SW1
VBAT
VBAT
KA_VBAT
VIGN
VKAM
VKAM_FB
VSEN
REGON
WAKEUP
VREF1
VPP_EN
VPP
VDD3_3
VDD3_3FB
VDDL_X
VDDL_B
VDDL_FB
/PRERESET
/HRESET
/PORESET
CANRXD
CANTXD
GND
CANL
CANH
HRT
/SLEEP
CS
DI
SCLK
DO
VREF3
VREF2
VDDH
VPRE_S
VPRE
VCOMP
INV
Ground
External power switch (MOSFET) gate drive — Boost Reg.
Bootstrap capacitor
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Battery supply to IC (external reverse battery protection needed in some applications)
Battery supply to IC (external reverse battery protection needed in some applications)
Keep alive battery supply (with internal protection diode)
Turn on control through ignition switch (with internal protection diode)
VDDL tracking Keep Alive Memory (Standby) supply
VKAM output feedback
Switched battery output
Regulator “Hold On” input
CAN wake up event output
VDDH tracking linear regulator 1
VPP enable
5.0 V/ 3.3 V FLASH memory programming supply, tracking VDDH/VDD3_3
3.3 V regulated supply output, base drive for optional external pass transistor
VDD3_3 output feedback
VDDL optional external pass transistor base drive, operating in Boost Mode only
VDDL external pass transistor base drive
VDDL output feedback
Open drain /PRERESET output, occurs 0.7 us prior to /HRESET (Hardware Reset)
Open drain / HRESET (Hardware Reset) output
Open drain / PORESET (Power On Reset) supervising VKAM supply to the microprocessor.
CAN receive data (DOUT)
CAN transmit data (DIN)
Ground
CAN differential bus drive low line
CAN differential bus drive high line
Hardware Reset Timer pin (programmed with external capacitor and resistor)
Sleep Mode & Power Down control
SPI chip select
SPI serial data in
SPI clock input
SPI serial data out
VDDH tracking linear regulator 3
VDDH tracking linear regulator 2
5.0 V regulated supply output
Switching pre–regulator output sense
Switching pre–regulator output
Switching pre–regulator compensation (error amplifier output)
Switching pre–regulator error amplifier inverting input
DESCRIPTION
NOTE: The exposed pad of the 44 QFN package is electrically and thermally connected with the IC ground.
4
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33394
PIN FUNCTION DESCRIPTION (54 SOICW–EP Package)
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
NAME
GND
CANL
CANH
HRT
/SLEEP
N/C
CS
DI
SCLK
DO
N/C
VREF3
VREF2
VDDH
VPRE_S
VPRE
VCOMP
INV
GND
SW2G
BOOT
SW1
SW1
SW1
SW1
SW1
VBAT
VBAT
VBAT
VBAT
VBAT
KA_VBAT
N/C
VIGN
VKAM
VKAM_FB
VSEN
REGON
WAKEUP
VREF1
VPP_EN
VPP
VDD3_3
VDD3_3FB
VDDL_X
VDDL_B
VDDL_FB
N/C
/PRERESET
/HRESET
/PORESET
CANRXD
CANTXD
Ground
CAN differential bus drive low line
CAN differential bus drive high line
Hardware Reset Timer pin (programmed with external capacitor and resistor)
Sleep Mode & Power Down control
No Connect
SPI chip select
SPI serial data in
SPI clock input
SPI serial data out
No Connect
VDDH tracking linear regulator 3
VDDH tracking linear regulator 2
5.0 V regulated supply output
Switching pre–regulator output sense
Switching pre–regulator output
Switching pre–regulator compensation (error amplifier output)
Switching pre–regulator error amplifier inverting input
Ground
External power switch (MOSFET) gate drive — Boost regulator
Bootstrap capacitor
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Source of the internal power switch (n–channel MOSFET)
Battery supply to IC (external reverse battery protection needed in some applications)
Battery supply to IC (external reverse battery protection needed in some applications)
Battery supply to IC (external reverse battery protection needed in some applications)
Battery supply to IC (external reverse battery protection needed in some applications)
Battery supply to IC (external reverse battery protection needed in some applications)
Keep alive supply (with internal protection diode)
No Connect
Turn–On control through ignition switch (with internal protection diode)
VDDL tracking Keep Alive Memory (Standby) supply
VKAM output feedback
Switched battery output
Regulator “Hold On” input
CAN wake up event output
VDDH tracking linear regulator 1
VPP enable
5.0 V/ 3.3 V FLASH memory programming supply, tracking VDDH/VDD3_3
3.3 V regulated supply output, base drive for optional external pass transistor
VDD3_3 output feedback
VDDL optional external pass transistor base drive, operating in Boost Mode only
VDDL external pass transistor base drive
VDDL output feedback
No Connect
Open drain /PRERESET output, occurs 0.7 us prior to /HRESET (Hardware Reset)
Open drain / HRESET (Hardware Reset) output
Open drain / PORESET (Power On Reset) supervising VKAM supply to the microprocessor.
CAN receive data (DOUT)
CAN transmit data (DIN)
DESCRIPTION
NOTE: The exposed pad of the 54 SOICW–EP package is electrically and thermally connected with the IC ground.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
5
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